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CAT28F010PA-12T Datasheet(PDF) 5 Page - Catalyst Semiconductor |
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CAT28F010PA-12T Datasheet(HTML) 5 Page - Catalyst Semiconductor |
5 / 15 page CAT28F010 5 Doc. No. 1019, Rev. D A.C. CHARACTERISTICS, Read Operation VCC = +5V ±10%, unless otherwise specified. 28F010-90(7) 28F010-12(7) JEDEC Standard Symbol Symbol Parameter Min Max Min Max Unit tAVAV tRC Read Cycle Time 90 120 ns tELQV tCE CE Access Time 90 120 ns tAVQV tACC Address Access Time 90 120 ns tGLQV tOE OE Access Time 35 50 ns tAXQX tOH Output Hold from Address OE/CE Change 0 0 ns tGLQX tOLZ(1)(6) OE to Output in Low-Z 0 0 ns tELZX tLZ(1)(6) CE to Output in Low-Z 0 0 ns tGHQZ tDF(1)(2) OE High to Output High-Z 20 30 ns tEHQZ tDF(1)(2) CE High to Output High-Z 30 40 ns tWHGL(1) - Write Recovery Time Before Read 6 6 µs SUPPLY CHARACTERISTICS Limits Symbol Parameter Min Max. Unit VCC VCC Supply Voltage 4.5 5.5 V VPPL VPP During Read Operations 0 6.5 V VPPH VPP During Read/Erase/Program 11.4 12.6 V Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) Output floating (High-Z) is defined as the state where the external data line is no longer driven by the output buffer. (3) Input Rise and Fall Times (10% to 90%) < 10 ns. (4) Input Pulse Levels = 0.45V and 2.4V. For High Speed Input Pulse Levels 0.0V and 3.0V. (5) Input and Output Timing Reference = 0.8V and 2.0V. For High Speed Input and Output Timing Reference = 1.5V. (6) Low-Z is defined as the state where the external data may be driven by the output buffer but may not be valid. (7) For load and reference points, see Fig. 1 INPUT PULSE LEVELS REFERENCE POINTS 2.0 V 0.8 V 2.4 V 0.45 V Figure 1. A.C. Testing Input/Output Waveform(3)(4)(5) Testing Load Circuit (example) 5108 FHD F04 5108 FHD F03 1.3V DEVICE UNDER TEST 1N914 3.3K CL = 100 pF OUT CL INCLUDES JIG CAPACITANCE |
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