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MC14513BCP Datasheet(PDF) 1 Page - ON Semiconductor

No. de pieza MC14513BCP
Descripción Electrónicos  BCD?뭈o?뭆even Segment Latch/Decoder/Driver CMOS MSI (Low?뭁ower Complementary MOS)
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Fabricante Electrónico  ONSEMI [ON Semiconductor]
Página de inicio  http://www.onsemi.com
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© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 6
1
Publication Order Number:
MC14513B/D
MC14513B
BCD−To−Seven Segment
Latch/Decoder/Driver
CMOS MSI
(Low−Power Complementary MOS)
The MC14513B BCD−to−seven segment latch/decoder/driver is
constructed with complementary MOS (CMOS) enhancement mode
devices and NPN bipolar output drivers in a single monolithic structure.
The circuit provides the functions of a 4−bit storage latch, an 8421
BCD−to−seven segment decoder, and has output drive capability. Lamp
test (LT), blanking (BI), and latch enable (LE) inputs are used to test the
display, to turn−off or pulse modulate the brightness of the display, and
to store a BCD code, respectively. The Ripple Blanking Input (RBI) and
Ripple Blanking Output (RBO) can be used to suppress either leading
or trailing zeroes. It can be used with seven−segment light emitting
diodes (LED), incandescent, fluorescent, gas discharge, or liquid crystal
readouts either directly or indirectly.
Applications include instrument (e.g., counter, DVM, etc.) display
driver, computer/calculator display driver, cockpit display driver, and
various clock, watch, and timer uses.
Features
Low Logic Circuit Power Dissipation
High−Current Sourcing Outputs (Up to 25 mA)
Latch Storage of Binary Input
Blanking Input
Lamp Test Provision
Readout Blanking on all Illegal Input Combinations
Lamp Intensity Modulation Capability
Time Share (Multiplexing) Capability
Adds Ripple Blanking In, Ripple Blanking Out to MC14511B
Supply Voltage Range = 3.0 V to 18 V
Capable of Driving Two Low−Power TTL Loads, One Low−Power
Schottky TTL Load to Two HTL Loads Over the Rated Temperature
Range
Pb−Free Package is Available*
MAXIMUM RATINGS (Voltages Referenced to VSS)
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
VDD
−0.5 to +18.0
V
Input Voltage Range, All Inputs
Vin
−0.5 to VDD +0.5
V
DC Current Drain per Input Pin
I
10
mA
Power Dissipation per Package (Note 1)
PD
500
mW
Operating Temperature Range
TA
−55 to +125
°C
Storage Temperature Range
Tstg
−65 to +150
°C
Maximum Continuous Output Drive
Current (Source) per Output
IOHmax
25
mA
Maximum Continuous Output Power
(Source) per Output (Note 2)
POHmax
50
mW
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/
_C From 65_C To 125_C
2. POHmax = IOH (VDD − VOH)
http://onsemi.com
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb−Free Package
MARKING DIAGRAM
1
18
PDIP−18
P SUFFIX
CASE 707
MC14513BCP
AWLYYWWG
1
Device
Package
Shipping
ORDERING INFORMATION
MC14513BCP
PDIP−18
20 Units/Rail
MC14513BCPG
PDIP−18
(Pb−Free)
20 Units/Rail
This device contains protection circuitry to protect
the inputs against damage due to high static voltages
or electric fields. However, it is advised that normal
precautions be taken to avoid application of any
voltage higher than maximum rated voltages to this
high−impedance circuit. A destructive high current
mode may occur if Vin and Vout are not constrained to
the range VSS v (Vin or Vout) v VDD.
Due to the sourcing capability of this circuit,
damage can occur to the device if VDD is applied, and
the outputs are shorted to VSS and are at a logical 1
(See Maximum Ratings).
Unused inputs must always be tied to an appropriate
logic voltage level (e.g., either VSS or VDD).
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.


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