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MC14549B Datasheet(PDF) 1 Page - ON Semiconductor |
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MC14549B Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 9 page © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 6 1 Publication Order Number: MC14549B/D MC14549B, MC14559B Successive Approximation Registers The MC14549B and MC14559B successive approximation registers are 8−bit registers providing all the digital control and storage necessary for successive approximation analog−to−digital conversion systems. These parts differ in only one control input. The Master Reset (MR) on the MC14549B is required in the cascaded mode when more than 8 bits are desired. The Feed Forward (FF) of the MC14559B is used for register shortening where End−of−Conversion (EOC) is required after less than eight cycles. Applications for the MC14549B and MC14559B include analog−to−digital conversion, with serial and parallel outputs. Features • Totally Synchronous Operation • All Outputs Buffered • Single Supply Operation • Serial Output • Retriggerable • Compatible with a Variety of Digital and Analog Systems such as the MC1408 8−Bit D/A Converter • All Control Inputs Positive−Edge Triggered • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Capable of Driving 2 Low−Power TTL Loads, 1 Low−Power Schottky TTL Load or 2 HTL Loads Over the Rated Temperature Range • Chip Complexity: 488 FETs or 122 Equivalent Gates • Pb−Free Packages are Available* MAXIMUM RATINGS (Voltages Referenced to VSS) Parameter Symbol Value Unit DC Supply Voltage Range VDD −0.5 to +18.0 V Input Voltage Range, All Inputs Vin −0.5 to VDD + 0.5 V DC Input Current per Pin Iin ±10 mA Power Dissipation per Package (Note 1) PD 500 mW Operating Temperature Range TA −55 to +125 °C Storage Temperature Range Tstg −65 to +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/ _C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. x = 4 or 5 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package MARKING DIAGRAMS http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. ORDERING INFORMATION PIN ASSIGNMENT 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 Q0 Q1 Q2 Q3 VDD SC * EOC Q7 Q6 Q5 Q4 VSS C D Sout *For MC14549B Pin 10 is MR input. For MC14559B Pin 10 is FF input. PDIP−16 P SUFFIX CASE 648 16 1 MC145x9BCP AWLYYWWG 1 1 SO−16W DW SUFFIX CASE 751G 16 1 MC145x9B AWLYYWWG |
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