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SG3526_06

 Pulse Width Modulation Control Circuit ( 9 Page)


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4
ELECTRICAL CHARACTERISTICS (continued)
Characteristics
Symbol
Min
Typ
Max
Unit
PWM COMPARATOR SECTION (Note 10)
Minimum Duty Cycle
(VCompensation = +0.4 V)
DCmin
0
%
Maximum Duty Cycle
(VCompensation = +3.6 V)
DCmax
45
49
%
DIGITAL PORTS (SYNC, SHUTDOWN, RESET)
Output Voltage
(High Logic Level) (Isource = 40 μA)
(Low Logic Level) (Isink = 3.6 mA)
VOH
VOL
2.4
4.0
0.2
0.4
V
Input Current ⎯ High Logic Level
(High Logic Level) (VIH = +2.4 V)
(Low Logic Level) (VIL = +0.4 V)
IIH
IIL
−125
−225
−200
−360
μA
CURRENT LIMIT COMPARATOR SECTION (Note 12)
Sense Voltage (RS ≤ 50 Ω)
Vsense
80
100
120
mV
Input Bias Current
IIB
−3.0
−10
μA
SOFT−START SECTION
Error Clamp Voltage (Reset = +0.4 V)
0.1
0.4
V
CSoft−Start Charging Current (Reset = +2.4 V)
ICS
50
100
150
μA
OUTPUT DRIVERS (Each Output, VC = +15 Vdc, unless otherwise noted.)
Output High Level
Isource = 20 mA
Isource = 100 mA
VOH
12.5
12
13.5
13
V
Output Low Level
Isink = 20 mA
Isink = 100 mA
VOL
0.2
1.2
0.3
2.0
V
Collector Leakage, VC = +40 V
IC(leak)
50
150
μA
Rise Time (CL = 1000 pF)
tr
0.3
0.6
μs
Fall Time (CL = 1000 pF)
tf
0.1
0.2
μs
Supply Current
(Shutdown = +0.4 V, VCC = +35 V, RT = 4.12 kΩ)
ICC
18
30
mA
10. fosc = 40 kHz (RT = 4.12 kΩ ± 1%, CT = 0.01 μF ± 1%, RD = 0 Ω)
11. 0 V ≤ VCM ≤ +5.2 V
12. 0 V ≤ VCM ≤ +12 V
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