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CD4541BC Datasheet(PDF) 1 Page - Fairchild Semiconductor

No. de pieza CD4541BC
Descripción Electrónicos  Programmable Timer
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Fabricante Electrónico  FAIRCHILD [Fairchild Semiconductor]
Página de inicio  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

CD4541BC Datasheet(HTML) 1 Page - Fairchild Semiconductor

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© 2002 Fairchild Semiconductor Corporation
DS006001
www.fairchildsemi.com
October 1987
Revised May 2002
CD4541BC
Programmable Timer
General Description
The CD4541BC Programmable Timer is designed with a
16-stage binary counter, an integrated oscillator for use
with an external capacitor and two resistors, output control
logic, and a special power-on reset circuit. The special fea-
tures of the power-on reset circuit are first, no additional
static power consumption and second, the part functions
across the full voltage range (3V–15V) whether power-on
reset is enabled or disabled.
Timing and the counter are initialized by turning on power,
if the power-on reset is enabled. When the power is
already on, an external reset pulse will also initialize the
timing and counter. After either reset is accomplished, the
oscillator frequency is determined by the external RC net-
work. The 16-stage counter divides the oscillator frequency
by any of 4 digitally controlled division ratios.
Features
s Available division ratios 28, 210, 213, or 216
s Increments on positive edge clock transitions
s Built-in low power RC oscillator (
±2% accuracy over
temperature range and
±10% supply and ±3% over pro-
cessing @
< 10 kHz)
s Oscillator frequency range
≈ DC to 100 kHz
s Oscillator may be bypassed if external clock is available
(apply external clock to pin 3)
s Automatic reset initializes all counters when power turns
on
s External master reset totally independent of automatic
reset operation
s Operates at 2n frequency divider or single transition
timer
s Q/Q select provides output logic level flexibility
s Reset (auto or master) disables oscillator during reset-
ting to provide no active power dissipation
s Clock conditioning circuit permits operation with very
slow clock rise and fall times
s Wide supply voltage range—3.0V to 15V
s High noise immunity—0.45 VDD (typ.)
s 5V–10V–15V parameter ratings
s Symmetrical output characteristics
s Maximum input leakage 1
µA at 15V over full tempera-
ture range
s High output drive (pin 8) min. one TTL load
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
N.C.—Not connected
Top View
Order Number
Package Number
Package Description
CD4541BCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4541BCN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide


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