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Philips Semiconductors Product specification LM193/A/293/A/393/A/2903 Low power dual voltage comparator 1995 Nov 27 4 DC ELECTRICAL CHARACTERISTICS (Continued) V+=5VDC, LM193/193A: -55 °C TA ≤ +125°C, unless otherwise specified. LM293/293A: -25°C TA ≤ +85°C, unless otherwise specified. LM393/393A: 0 °C TA ≤ +70°C, unless otherwise specified. LM2903: -40°C TA ≤ +125°C, unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS LM193 LM293/393 UNIT SYMBOL PARAMETER TEST CONDITIONS Min Typ Max Min Typ Max UNIT VOS Input offset voltage2 TA=25°C Over temp. ±2.0 ±5.0 ±9.0 ±2.0 ±5.0 ±9.0 mV mV VCM Input common-mode voltage range3, 6 TA=25°C Over temp. 0 0 V ±-1.5 V ±-2.0 0 0 V+-1.5 V+-2.0 V V VIDR Differential input voltage1 Keep all VINs ≥0VDC (or V-if need) V+ V+ V IBIAS Input bias current4 IIN(+) or IIN(-) with output in linear range TA=25°C Over temp. 25 100 300 25 250 400 nA nA IOS Input offset current IIN(+)-IIN(-) TA=25°C Over temp. ±3.0 ±25 ±100 ±5.0 ±50 ±150 nA nA IOL Output sink current VIN(-)≥1VDC, VIN(+)=0, V0≤1.5VDC TA=25°C 6.0 16 6.0 16 mA Output leakage current VIN(+)≥1VDC, VIN(-)=0, V0=5VDC TA=25°C V0=30VDC over temp. 0.1 1.0 0.1 1.0 nA µA ICC Supply current RL=∞ on both comparators, TA=25°C 0.8 1 0.8 1 mA RL=∞ on both comparators, V+=30V 2.5 2.5 mA AV Voltage gain RL≥15kΩ, V+=15VDC 50 200 50 200 V/mV VOL Saturation voltage VIN(-)≥1VDC, VIN(+)=0, ISINK≤4mA TA=25°C Over temp. 250 400 700 250 400 700 mV mV tLSR Large signal response time VIN=TTL logic swing, VREF=1.4VDC, VRL=5VDC RL=5.1kΩ, TA=25°C 300 300 ns tR Response time5 VRL=5VDC, RL=5.1kΩ TA=25°C 1.3 1.3 µs NOTES: 1. Positive excursions of input voltage may exceed the power supply level by 17V. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than -0.3VDC (VDC below the magnitude of the negative power supply, if used). 2. At output switch point, VO ≈ 1.4VDC, RS=0Ω with V+ from 5VDC to 30VDC and over the full input common-mode range (0VDC to V+-1.5VDC). 3. The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the common-mode voltage range is V+-1.5V, but either or both inputs can go to 30VDC without damage. 4. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the reference or input lines. 5. The response time specified is for a 100mV input step with a 5mV overdrive. 6. For input signals that exceed VCC, only the over-driven comparator is affected. With a 5V supply, VIN should be limited to 25V maximum, and a limiting resistor should be used on all inputs that might exceed the positive supply. |
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