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AM29LV160MB70RPCI Datasheet(PDF) 5 Page - Advanced Micro Devices

No. de pieza AM29LV160MB70RPCI
Descripción Electrónicos  16 Megabit (2 M x 8-Bit/1 M x 16-Bit) MirrorBit TM 3.0 Volt-only Boot Sector Flash Memory
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Fabricante Electrónico  AMD [Advanced Micro Devices]
Página de inicio  http://www.amd.com
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AM29LV160MB70RPCI Datasheet(HTML) 5 Page - Advanced Micro Devices

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January 31, 2007 25974B5
Am29LV160M
3
Data
Sheet
Table of Contents
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10
Table 1. Am29LV160M Device Bus Operations .......................10
Word/Byte Configuration .................................................................. 10
Requirements for Reading Array Data ........................................... 10
Writing Commands/Command Sequences .....................................11
Program and Erase Operation Status ...............................................11
Standby Mode ...........................................................................................11
Automatic Sleep Mode .........................................................................12
RESET#: Hardware Reset Pin .............................................................12
Output Disable Mode ...........................................................................12
Table 2. Sector Address Tables (Am29LV160MT) ...................13
Table 3. Sector Address Tables (Am29LV160MB) ...................14
Autoselect Mode ....................................................................................15
Table 4. Autoselect Codes (High Voltage Method) ..................15
Sector Protection/Unprotection .......................................................15
Temporary Sector Unprotect ............................................................16
Figure 1. Temporary Sector Unprotect Operation................... 16
Figure 2. In-System Single High Voltage Sector Protect/
Unprotect Algorithms ........................................................ 17
Secured Silicon Sector Flash Memory Region .............................. 18
Table 5. Secured Silicon Sector Addressing ...........................18
Customer Lockable: Secured Silicon Sector NOT Programmed
or Protected At the Factory .............................................................. 18
Figure 3. Secured Silicon Sector Protect Verify ...................... 19
Common Flash Memory Interface (CFI) ....................................... 20
Table 6. CFI Query Identification String ...............................20
Table 7. System Interface String .........................................21
Table 8. Device Geometry Definition ....................................21
Table 9. Primary Vendor-Specific Extended Query .................22
Hardware Data Protection ................................................................22
Low VCC Write Inhibit ........................................................................22
Write Pulse “Glitch” Protection ......................................................22
Logical Inhibit ..........................................................................................23
Power-Up Write Inhibit ......................................................................23
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 23
Reading Array Data ..............................................................................23
Reset Command ....................................................................................23
Autoselect Command Sequence ......................................................24
Word/Byte Program Command Sequence ...................................24
Unlock Bypass Command Sequence ...............................................25
Figure 4. Program Operation .............................................. 26
Chip Erase Command Sequence ......................................................26
Sector Erase Command Sequence ...................................................27
Erase Suspend/Erase Resume Commands .....................................27
Figure 5. Erase Operation .................................................. 29
Program Suspend/Program Resume Command Sequence .......29
Figure 6. Program Suspend/Program Resume ....................... 30
Command Definitions Tables .............................................................31
Write Operation Status . . . . . . . . . . . . . . . . . . . . 33
DQ7: Data# Polling .............................................................................. 33
Figure 7. Data# Polling Algorithm ....................................... 34
RY/BY#: Ready/Busy# ..........................................................................34
DQ6: Toggle Bit I ..................................................................................35
DQ2: Toggle Bit II .................................................................................35
Reading Toggle Bits DQ6/DQ2 ........................................................36
Figure 8. Toggle Bit Algorithm............................................ 37
DQ5: Exceeded Timing Limits ..........................................................37
DQ3: Sector Erase Timer ...................................................................38
Table 12. Write Operation Status ........................................ 38
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . .39
Figure 9. Maximum Negative Overshoot Waveform ............... 39
Figure 10. Maximum Positive Overshoot Waveform ............... 39
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 39
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 40
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 11. Test Setup........................................................ 41
Table 13. Test Specifications .............................................. 41
Figure 12. Input Waveforms and Measurement Levels ........... 41
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .42
Read Operations ...................................................................................42
Figure 13. Read Operations Timings.................................... 42
Hardware Reset (RESET#) .................................................................43
Figure 14. RESET# Timings ............................................... 43
Word/Byte Configuration (BYTE#) ..............................................44
Figure 15. BYTE# Timings for Read Operations..................... 44
Figure 16. BYTE# Timings for Write Operations .................... 44
Erase/Program Operations ................................................................45
Figure 17. Program Operation Timings ................................ 46
Figure 18. Chip/Sector Erase Operation Timings ................... 47
Figure 19. Data# Polling Timings
(During Embedded Algorithms) .......................................... 48
Figure 20. Toggle Bit Timings
(During Embedded Algorithms) .......................................... 48
Figure 21. DQ2 vs. DQ6 for Erase and
Erase Suspend Operations ................................................. 49
Figure 22. Temporary Sector Unprotect/Timing Diagram........ 49
Figure 23. Sector Protect/Unprotect Timing Diagram ............. 50
Figure 24. Alternate CE# Controlled Write Operation Timings . 52
Erase and Programming Performance . . . . . . . . .53
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 53
TSOP Pin and BGA Package Capacitance . . . . . 53
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . .54
TS 048—48-Pin Standard TSOP ......................................................54
TSR048—48-Pin Reverse TSOP ......................................................55
FBA048—48-Ball Fine-Pitch Ball Grid Array (BGA)
6 x 8 mm Package .................................................................................56
LAA064—64-Ball Fortified Ball Grid Array (BGA)
13 x 11 mm Package ................................................................................57
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 58


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