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AM29LV033MU112RWCI Datasheet(PDF) 6 Page - SPANSION

No. de pieza AM29LV033MU112RWCI
Descripción Electrónicos  32 Megabit (4 M x 8-Bit) MirrorBit??3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O??Control
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Am29LV033MU
September 12, 2006
DA TA
SH EET
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Table 1. Device Bus Operations .....................................................10
VersatileIO
™ (V
IO) Control ..................................................... 10
Requirements for Reading Array Data ................................... 10
Page Mode Read .................................................................... 11
Writing Commands/Command Sequences ............................ 11
Write Buffer ............................................................................. 11
Accelerated Program Operation ............................................. 11
Autoselect Functions .............................................................. 11
Standby Mode ........................................................................ 11
Automatic Sleep Mode ........................................................... 11
RESET#: Hardware Reset Pin ............................................... 12
Output Disable Mode .............................................................. 12
Table 2. Sector Address Table ........................................................13
Autoselect Mode..................................................................... 15
Table 3. Autoselect Codes, (High Voltage Method) .......................15
Sector Group Protection and Unprotection ............................. 16
Table 4. Sector Group Protection/Unprotection Address Table .....16
Temporary Sector Group Unprotect ....................................... 17
Figure 1. Temporary Sector Group Unprotect Operation................ 17
Figure 2. In-System Sector Group Protect/Unprotect Algorithms ... 18
SecSi (Secured Silicon) Sector Flash Memory Region .......... 19
Table 5. SecSi Sector Contents ......................................................19
Figure 3. SecSi Sector Protect Verify.............................................. 20
Hardware Data Protection ...................................................... 20
Low VCC Write Inhibit ............................................................ 20
Write Pulse “Glitch” Protection ............................................... 20
Logical Inhibit .......................................................................... 20
Power-Up Write Inhibit ............................................................ 20
Common Flash Memory Interface (CFI) . . . . . . . 20
Table 6. CFI Query Identification String .............................. 21
Table 7. System Interface String......................................................21
Table 8. Device Geometry Definition................................... 22
Table 9. Primary Vendor-Specific Extended Query............. 23
Command Definitions . . . . . . . . . . . . . . . . . . . . . 23
Reading Array Data ................................................................ 23
Reset Command ..................................................................... 24
Autoselect Command Sequence ............................................ 24
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 24
Byte Program Command Sequence ....................................... 24
Unlock Bypass Command Sequence ..................................... 25
Write Buffer Programming ...................................................... 25
Accelerated Program .............................................................. 26
Figure 4. Write Buffer Programming Operation............................... 27
Figure 5. Program Operation .......................................................... 28
Program Suspend/Program Resume Command Sequence ... 28
Figure 6. Program Suspend/Program Resume............................... 29
Chip Erase Command Sequence ........................................... 29
Sector Erase Command Sequence ........................................ 29
Figure 7. Erase Operation............................................................... 30
Erase Suspend/Erase Resume Commands ........................... 31
Command Definitions ............................................................. 32
Table 10. Command Definitions...................................................... 32
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 33
DQ7: Data# Polling ................................................................. 33
Figure 8. Data# Polling Algorithm .................................................. 33
RY/BY#: Ready/Busy#............................................................ 34
DQ6: Toggle Bit I .................................................................... 34
Figure 9. Toggle Bit Algorithm........................................................ 35
DQ2: Toggle Bit II ................................................................... 35
Reading Toggle Bits DQ6/DQ2 ............................................... 35
DQ5: Exceeded Timing Limits ................................................ 36
DQ3: Sector Erase Timer ....................................................... 36
DQ1: Write-to-Buffer Abort ..................................................... 36
Table 11. Write Operation Status ................................................... 36
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 37
Figure 10. Maximum Negative Overshoot Waveform ................... 37
Figure 11. Maximum Positive Overshoot Waveform..................... 37
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 37
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 12. Test Setup.................................................................... 39
Table 12. Test Specifications ......................................................... 39
Key to Switching Waveforms. . . . . . . . . . . . . . . . 39
Figure 13. Input Waveforms and
Measurement Levels...................................................................... 39
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 40
Read-Only Operations ........................................................... 40
Figure 14. Read Operation Timings ............................................... 40
Figure 15. Page Read Timings ...................................................... 41
Hardware Reset (RESET#) .................................................... 42
Figure 16. Reset Timings ............................................................... 42
Erase and Program Operations .............................................. 43
Figure 17. Program Operation Timings.......................................... 44
Figure 18. Accelerated Program Timing Diagram.......................... 44
Figure 19. Chip/Sector Erase Operation Timings .......................... 45
Figure 20. Data# Polling Timings
(During Embedded Algorithms)...................................................... 46
Figure 21. Toggle Bit Timings
(During Embedded Algorithms)...................................................... 47
Figure 22. DQ2 vs. DQ6................................................................. 47
Temporary Sector Unprotect .................................................. 48
Figure 23. Temporary Sector Group Unprotect Timing Diagram ... 48
Figure 24. Sector Group Protect and Unprotect Timing Diagram .. 49
Alternate CE# Controlled Erase and Program Operations ..... 50
Figure 25. Alternate CE# Controlled Write (Erase/Program)
Operation Timings.......................................................................... 51
Erase And Programming Performance. . . . . . . . 52
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 52
TSOP Pin and BGA Package Capacitance . . . . . 52
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 54
TS 040—40-Pin Standard Thin Small Outline Package ......... 54
TSR040—40-Pin Reverse Thin Small Outline Package ......... 55
FBC048—48-Ball Fine-Pitch Ball Grid Array
9 x 8 mm Package .................................................................. 56
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 57


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