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74ACTQ16374 Datasheet(PDF) 1 Page - Fairchild Semiconductor

No. de pieza 74ACTQ16374
Descripción Electrónicos  16-Bit D-Type Flip-Flop with 3-STATE Outputs
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Fabricante Electrónico  FAIRCHILD [Fairchild Semiconductor]
Página de inicio  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74ACTQ16374 Datasheet(HTML) 1 Page - Fairchild Semiconductor

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© 2005 Fairchild Semiconductor Corporation
DS010935
www.fairchildsemi.com
June 1991
Revised May 2005
74ACTQ16374
16-Bit D-Type Flip-Flop with 3-STATE Outputs
General Description
The ACTQ16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and Output Enable (OE) are common to each byte
and can be shorted together for full 16-bit operation.
The ACTQ16245 utilizes Fairchild Quiet Series
¥ technol-
ogy to guarantee quiet output switching and improved
dynamic threshold performance. FACT Quiet Series
¥ fea-
tures GTO
¥ output control for superior performance.
Features
s Utilizes Fairchild FACT Quiet Series technology
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin output skew
s Buffered Positive edge-triggered clock
s Separate control logic for each byte
s 16-bit version of the ACTQ374
s Outputs source/sink 24 mA
s Additional specs for Multiple Output Switching
s Output loadings specs for both 50 pF and 250 pF loads
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagram
FACT
¥, FACT Quiet Series¥ and GTO¥ are trademarks of Fairchild Semiconductor Corporation.
Order Number
Package Number
Package Description
74ACTQ16374SSC
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74ACTQ16374MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin
Description
Names
OEn
Output Enable Input (Active LOW)
CPn
Clock Pulse Input
I0–I15
Inputs
O0–O15
Outputs


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