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AM49LV128BMAH11NS Datasheet(PDF) 5 Page - SPANSION

No. de pieza AM49LV128BMAH11NS
Descripción Electrónicos  128 Megabit (8 M x 16-Bit) MirrorBit??Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
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AM49LV128BMAH11NS Datasheet(HTML) 5 Page - SPANSION

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June 17, 2004
Am49LV128BM
3
TABLE OF CONTENTS
Continuity of Specifications . . . . . . . . . . . 3
Continuity of Ordering Part Numbers . . . . . 3
For More Information . . . . . . . . . . . . . . . . 3
Distinctive Characteristics . . . . . . . . . . . . . . . . . . . .
General Description . . . . . . . . . . . . . . . . . . . . . . 2
Related Documents . . . . . . . . . . . . . . . . . . . . . . . . 2
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . .4
MCP Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . .4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .5
Special Package Handling Instructions . . . . 5
Look Ahead pinout . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 10
Device Bus Operations . . . . . . . . . . . . . . . . . 10
Requirements for Reading Array Data . . . 10
Writing Commands/Command Sequences 11
Standby Mode ........................................................................ 11
Automatic Sleep Mode . . . . . . . . . . . . . . 11
RESET#: Hardware Reset Pin . . . . . . . . . 12
Output Disable Mode . . . . . . . . . . . . . . . 12
Sector Address Table . . . . . . . . . . . . . . . . . . 12
SecSi (Secured Silicon) Sector Flash Memory
Region . . . . . . . . . . . . . . . . . . . . . . . . . 17
SecSi Sector Contents . . . . . . . . . . . . . . . . 18
Sector Group Protection and Unprotection............................. 19
Sector Group Protection/Unprotection
Address Table . . . . . . . . . . . . . . . . . . . . . . 19
Write Protect (WP#) ................................................................ 20
Temporary Sector Group Unprotect . . . . . 20
Temporary Sector Group Unprotect Operation 20
In-System Sector Group Protect/Unprotect
Algorithms . . . . . . . . . . . . . . . . . . . . . . . . 21
Hardware Data Protection . . . . . . . . . . . 22
Common Flash Memory Interface (CFI). . . . . . . .22
Command Definitions . . . . . . . . . . . . . . . . . . . . . . .24
Reading Array Data . . . . . . . . . . . . . . . . 24
Reset Command . . . . . . . . . . . . . . . . . . 25
Autoselect Command Sequence . . . . . . . 25
Enter SecSi Sector/Exit SecSi Sector
Command Sequence . . . . . . . . . . . . . . . 25
Word Program Command Sequence . . . . . 25
Write Buffer Programming Operation . . . . . . . 28
Program Operation . . . . . . . . . . . . . . . . . . . 29
Program Suspend/Program Resume
Command Sequence . . . . . . . . . . . . . . . 29
Program Suspend/Program Resume . . . . . . . 30
Chip Erase Command Sequence . . . . . . . 30
Sector Erase Command Sequence . . . . . . 30
Erase Operation . . . . . . . . . . . . . . . . . . . . . 31
Erase Suspend/Erase Resume Commands 31
Command Definitions .............................................................. 32
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 33
DQ7: Data# Polling . . . . . . . . . . . . . . . . 33
Data# Polling Algorithm . . . . . . . . . . . . . . . . 33
DQ6: Toggle Bit I. . . . . . . . . . . . . . . . . . 33
Toggle Bit Algorithm . . . . . . . . . . . . . . . . . . 34
DQ2: Toggle Bit II . . . . . . . . . . . . . . . . . 34
Reading Toggle Bits DQ6/DQ2 . . . . . . . . 35
DQ5: Exceeded Timing Limits . . . . . . . . . 35
DQ3: Sector Erase Timer . . . . . . . . . . . . 35
DQ1: Write-to-Buffer Abort . . . . . . . . . . . 35
Write Operation Status . . . . . . . . . . . . . . . . 36
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 37
Maximum Negative Overshoot Waveform . . 37
Maximum Positive Overshoot Waveform . . . 37
Flash DC Characteristics . . . . . . . . . . . . . . . . . . . . 38
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Test Setup . . . . . . . . . . . . . . . . . . . . . . . . 39
Test Specifications . . . . . . . . . . . . . . . . . . . 39
Key to Switching Waveforms. . . . . . . . . . . . . . . . 39
Input Waveforms and Measurement
Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 40
VCC Power-up ........................................................................ 40
VCC Power-up Diagram . . . . . . . . . . . . . . . . 40
Read Operations Timings . . . . . . . . . . . . . . . 41
Page Read Timings . . . . . . . . . . . . . . . . . . . 42
Hardware Reset (RESET#) .................................................... 43
Reset Timings . . . . . . . . . . . . . . . . . . . . . . 43
Erase and Program Operations .............................................. 44
Program Operation Timings . . . . . . . . . . . . . 45
Accelerated Program Timing Diagram. . . . . . 45
Chip/Sector Erase Operation Timings . . . . . . 46
Data# Polling Timings (During Embedded
Algorithms) . . . . . . . . . . . . . . . . . . . . . . . . 47
Toggle Bit Timings (During Embedded
Algorithms). . . . . . . . . . . . . . . . . . . . . . . . 48
DQ2 vs. DQ6. . . . . . . . . . . . . . . . . . . . . . . . 48
Temporary Sector Unprotect .................................................. 49
Temporary Sector Group Unprotect
Timing Diagram . . . . . . . . . . . . . . . . . . . . . 49
Sector Group Protect and Unprotect
Timing Diagram . . . . . . . . . . . . . . . . . . . . . 50
Alternate CE# Controlled Erase and Program
Operations .............................................................................. 51
Alternate CE# Controlled Write (Erase/Program)
Operation Timings 5. . . . . . . . . . . . . . . . . . . . 2
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 52
Erase And Programming Performance. . . . . . . . . 53
BGA Package Capacitance. . . . . . . . . . . . . . . . . . 53
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Function Truth Table . . . . . . . . . . . . . . . . . . . . . . . 55
Power Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Recommended Operating Conditions . . . . . . . . . 57
pSRAM DC Characteristics . . . . . . . . . . . . . . . . . . 58
pSRAM AC Characteristics . . . . . . . . . . . . . . . . . . 59
Read Operation . . . . . . . . . . . . . . . . . . . 59
Write Operation . . . . . . . . . . . . . . . . . . 60
Power Down Parameters . . . . . . . . . . . . 61
Other Timing Parameters . . . . . . . . . . . . 61
AC Test Conditions . . . . . . . . . . . . . . . . . 62
AC Measurement Output Load Circuit . . . . . . 62
Timing Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . 63


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