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ISL28272FAZ-T7 Datasheet(PDF) 10 Page - Intersil Corporation |
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ISL28272FAZ-T7 Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 14 page 10 FN6390.0 December 8, 2006 Pin Descriptions ISL28271 16 Ld QSOP ISL28272 16 Ld QSOP PIN NAME EQUIVALENT CIRCUIT PIN FUNCTION 2, 15 2, 15 OUT_A,B Circuit 3 Output Voltage. A complementary Class AB common-source output stage drives the output of each channel. When disabled, the outputs are in a high impedance state. 3, 14 3, 14 FB+_A,B Circuit 1A, Circuit 1B Positive Feedback high impedance terminals. ISL28272 input circuit is shown in Circuit 1A, and the ISL28271 input circuit is shown in Circuit 1B. ISL28271: to avoid offset drift, it is recommended that the terminals of the ISL28271 are not overdriven beyond 1V and the input current must never exceed 5mA. 4, 13 4, 13 FB-_A,B Circuit 1A, Circuit 1B Negative Feedback high impedance terminals. The FB- pins connect to an external resistor divider to individually set the desired gain of the in-amp. ISL28272 input circuit is shown in Circuit 1A, and the ISL28271 input circuit is shown in Circuit 1B. ISL28271: to avoid offset drift, it is recommended that the terminals of the ISL28271 are not overdriven beyond 1V and the input current must never exceed 5mA. 5, 12 5, 12 IN-_A,B Circuit 1A, Circuit 1B High impedance Inverting input terminals. Connect to the low side of the input source signal. ISL28272 input circuit is shown in Circuit 1A, and the ISL28271 input circuit is shown in Circuit 1B. ISL28271: to avoid offset drift, it is recommended that the terminals of the ISL28271 are not overdriven beyond 1V and the input current must never exceed 5mA. 6, 11 6, 11 IN+_A,B Circuit 1A, Circuit 1B High impedance Non-inverting input terminals. Connect to the high side of the input source signal. ISL28272 input circuit is shown in Circuit 1A, and the ISL28271 input circuit is shown in Circuit 1B. ISL28271: to avoid offset drift, it is recommended that the terminals of the ISL28271 are not overdriven beyond 1V and the input current must never exceed 5mA. 7, 10 7, 10 EN_A,B Circuit 2 Active LOW logic pins. When pulled above 2V, the corresponding channel turns off and OUT is high impedance. A channel is enabled when pulled below 0.8V. Built-in pull downs define each EN pin LOW when left floating. 16 16 V+ Circuit 4 Positive Supply terminal shared by all channels. 8 8 V- Circuit 4 Negative Supply terminal shared by all channels. Grounded for single supply operation. 1, 9 1, 9 NC No Connect, pins can be left floating or grounded. IN- V+ V- LOGIC PIN V+ V- V+ V- OUT CIRCUIT 3 CIRCUIT 1A CIRCUIT 2 V+ V- CAPACITIVELY COUPLED ESD CLAMP CIRCUIT 4 V+ V- CIRCUIT 1B FB- IN- FB- IN+ FB+ IN+ FB+ ISL28271, ISL28272 |
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