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CDC706PWR Datasheet(PDF) 3 Page - Texas Instruments |
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CDC706PWR Datasheet(HTML) 3 Page - Texas Instruments |
3 / 41 page www.ti.com PLL1 XO or 2LVCMOS or Differential Input MUX MUX PLL3 PFD Filter VCO PLL2 w/SSC PFD Filter VCO SO/CLK_SEL S1 SCLOCK OutputSwitchMatrix LV CMOS LV CMOS LV CMOS LV CMOS LV CMOS LV CMOS PROGRAMMING LOGIC SMBUS LOGIC PFD Filter VCO SDATA Y5 Y4 Y3 Y2 Y1 Y0 VCO1Bypass VCO2Bypass VCO3Bypass MUX PLL Bypass VCC GND VCCOUT1 GND VCCOUT2 prg. 9Bit DividerM prg.12Bit DividerN prg.9Bit DividerM prg.12Bit DividerN prg.9Bit DividerM prg.12Bit DividerN CLK_IN1 FactoryPrg. CLK_IN0 SSC On/Off 5x6 − Switch A Input CLK (PLL Bypass) PLL 1 PLL 2 non SSC PLL 2 w/ SSC PLL 3 6x6 − Switch B 7-Bit Divider Y0 Y1 Y2 Y3 Y4 Y5 P0 P1 P2 P3 P4 P5 Programming CDC706 SCAS829A – SEPTEMBER 2006 – REVISED MARCH 2007 FUNCTIONAL BLOCK DIAGRAM OUTPUT SWITCH MATRIX 3 Submit Documentation Feedback |
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