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CDCE421RGERG4 Datasheet(PDF) 7 Page - Texas Instruments

No. de pieza CDCE421RGERG4
Descripción Electrónicos  Fully Integrated Wide-Range, Low-Jitter, Crystal-Oscillator Clock Generator
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Fabricante Electrónico  TI [Texas Instruments]
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CDCE421RGERG4 Datasheet(HTML) 7 Page - Texas Instruments

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EXAMPLE: Programming Cycle of Six Words and Programming Into EEPROM
EnterProgrammingSequence
Word0
After8bits,thepayload
dataistransferredto
theRAMandisactive.
Waitforatleast
10msbefore
exitingEEPROM
writephase,for
safeoperation.
Payload
Word1
Payload
Word5
Payload
State
Machine
Jump
State
Machine
Jump
State2
State3
®
State3
State1
®
T0043-03
·
·
·
·
·
·
Enter Register Readback Mode and Related Timing Diagram
CDCE421
SCAS842 – APRIL 2007
The following sequence shows how to enter programming mode and how the different words can be written. The
addressing of Word0
… Word5 is shown in bold. After the word address, the payload for the respective word is
clocked in. In this example, this is followed by a jump from State 2
→ State 3 into enter EEPROM programming
with EEPROM lock. In the EEPROM-programming state, it is necessary to wait at least 10 ms for safe
programming. The last command is a jump from State 3 into State 1 (normal operation). Cycle power and verify
that the device functions as programmed.
Figure 4. Programming Cycle of Six Words and Programming Into EEPROM
Similar to the enter programming mode sequence, the enter register read back mode is written into SDATA.
After the command has been issued, the SDATA input is reconfigured as clock input. By applying one clock, the
EEPROM content is read into shift registers. Now, by further applying clocks at SDATA, the EEPROM content
can be clocked out and observed at OUTP/OUTN. There are 59 bits to be clocked out. With the 61st rising clock
edge, the OUTP/OUTN pins are reconfigured back into normal operation.
7
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