2001 Aug 15

8

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

START, ADDRESS, WRITE, CONTROL byte, STOP.

Table 2

CONTROL bits (all bits cleared after power-on)

NAME

BIT

DESCRIPTION

START/STOP

0

when set, initiates an activation and a cold reset procedure; when reset, initiates a

deactivation sequence

WARM

1

when set, initiates a warm reset procedure; automatically reset by hardware when the card

starts answering or when the card is declared mute

3 and 5 V

2

PDOWN

3

when set, the configuration defined by bit CLKPD is applied on pin CLK, and the circuit

enters the Power-down mode; when reset, the circuit goes back to normal (active) mode

CLKPD

4

when set, CLK is stopped HIGH during Power-down mode; when reset, CLK is stopped LOW

in Power-down mode

CLKSEL1

5

bits 5 and 6 determine the clock to the card in normal mode according to Table 3

CLKSEL2

6

I/OEN

7

when set, I/O is transferred on I/OuC; when reset, I/O to I/OuC is high-impedance

When deactivating the card, by resetting the START bit,

only bit 0 must be changed.

The clock to the cards in active mode is selected with

bits CLKSEL1 and CLKSEL2; see Table 3.

Table 3

Selecting the card clock.

All frequency changes are synchronous, thus ensuring

that no pulse is shorter than 45% of the smallest period.

For cards power reduction modes, CLKIN may be stopped

after switching to STOP LOW or STOP HIGH. CLKIN

should be restarted before leaving this mode.

A correct duty factor can not be guaranteed in the CLKIN

configuration, as it depends on the duty factor of the

CLKIN signal.

BIT CLKSEL2

BIT CLKSEL1

CLOCK

OUTPUT

0

0

CLKIN/8

0

1

CLKIN/4

1

0

CLKIN/2

1

1

CLKIN