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TDA8501 Datasheet(PDF) 6 Page - NXP Semiconductors |
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TDA8501 Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 30 page  April 1993 6 Philips Semiconductors Preliminary specification PAL/NTSC encoder TDA8501 FUNCTIONAL DESCRIPTION The TDA8501 device comprises: • encoder circuit • oscillator and filter control • sync separator and pulse shaper. Within this functional description, the term Y is used to describe the luminance signal and the terms U and V respectively, are used to describe the colour difference signals. Encoder circuit INPUT STAGE The input stage of the device uses two signal paths (see Fig.1). Fast switching between the two signal paths is achieved by means of the signal path selection switch MCONTROL (pin 2). R, B AND G INPUT SIGNALS PATH One signal path provides the connection for R, G and B signal inputs (via pins 7, 9 and 11) which are connected to a matrix via clamping and line blanking circuits. The signal outputs from the matrix are U, V and Y. For an EBU colour bar of 75% the amplitude of the signal must be 0.7 V (peak-to-peak): When selected (via MCONTROL), the U, V signals from the matrix are routed through the selection switch to the low pass filters. The Y signal from the matrix is routed through the selection switch to the adder and combined with the sync pulse from the sync separator and then connected via a buffer internally to pin 22 (Y + SYNC OUT to delay line). −(R−Y), −(B−Y) AND Y INPUT SIGNALS PATH A second signal path provides the connection for negative colour difference signal inputs −(R−Y), −(B−Y) i.e. V, U (via pins 1, 3) and luminance Y (via pin 5), which are routed directly to the switch inputs via clamping and line blanking circuits. U = 0.493 (B −Y) V = 0.877 (R −Y) Y = 0.299 R +0.587 G +0.114 B The Y input signal (via pin 5) differs from other signal inputs, in that the timing of the internal clamp is after the sync period. The amplitude and polarity of these colour difference and luminance input signals are processed to provide suitable switch inputs of U, V and Y signal values. The condition for 75% colour bar is: When selected (via MCONTROL), the U and V signals (via the switch) are routed to the low pass filters. The Y signal (via the switch) is routed via the adder and buffer to pin 22 (Y +SYNC OUT to delay line). Dependent on pin 17 conditioning, the Y signal may have external or internal sync added (see section Four level control pin). FOUR LEVEL CONTROL PIN The Y input signal (via pin 5) is conditioned by use of the 4-level control pin (pin 17) to emulate either the PAL or NTSC modes, with sync and input blanking off or without sync and input blanking on. Pin 17 may be hard wire connected to either ground (LOW for PAL mode) or VCC (HIGH for NTSC mode). External resistors can further modify the voltage level input at pin 17 to condition (pin 5) Y with sync and input blanking off or Y without sync and input blanking on. (see section PAL/NTSC and Y/Y +SYNC). U AND V SIGNALS In PAL and NTSC modes the U and V (colour difference) signals at the output of the switch are configured differently as follows: PAL mode: • after the adding of the burst pulse to U and V, these signals are connected to the input of the low pass filters. During the vertical sync period the burst pulse is suppressed. NTSC mode: • the burst pulse is only added to U and the gain of the U and V signals is 0.95 of the gain in PAL mode. During the vertical sync period the burst pulse is suppressed. pin 1 −(R−Y) = 1.05 V (peak-to-peak) pin 3 −(B−Y) = 1.33 V (peak-to-peak) pin 5 Y = 1 V (peak-to-peak) without sync |
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Descripción similar - TDA8501 |
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