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TDA8707H Datasheet(PDF) 2 Page - NXP Semiconductors |
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TDA8707H Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 16 page 1996 Feb 01 2 Philips Semiconductors Product specification Triple RGB 6-bit video analog-to-digital interface TDA8707 FEATURES • Triple analog-to-digital converter (ADC) • 6-bit resolution • Sampling rate up to 35 MHz • Power dissipation of 335 mW (typical) • Internal clamping function • TTL compatible digital inputs •−40 to +85 °C operating temperature • CMOS digital outputs. APPLICATIONS • High-speed analog-to-digital conversion for video signals • VGA signal treatment. DESCRIPTION The TDA8707 is a CMOS triple 6-bit video low-power analog-to-digital converter (ADC) for RGB signals. It converts the analog inputs into 6-bit binary coded digital words at a sampling rate of 35 MHz. All analog signal inputs are clamped. Analog-to-digital converter The TDA8707 implements 3 independent 6-bit analog-to-digital converters in CMOS process. These converters use a full-flash approach. Clamping feature An internal clamping circuit is provided in each of the 3 analog channels. The analog pins INR, ING and INB are switched, through series capacitors, to on-chip clamping levels during an active pulse on the clamp input CLP. Clamping level in the R, G and B channels is Code 0. Input buffers Internal buffers are provided to drive the analog-to-digital converter inputs. Their ratio can be adjusted externally at 1.5 or 2.0 with select input SLT. QUICK REFERENCE DATA Notes 1. The number of effective bits is measured with a clock frequency of 35 MHz. This value is given for a 4.43 MHz frequency on the R, G and B channels. 2. The external resistor (value 15 k Ω) between VDDA and CLREF, fixing internal static currents, influences Ptot. ORDERING INFORMATION SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDDA analog supply voltage 4.5 5.0 5.5 V VDDD digital supply voltage 4.5 5.0 5.5 V IDDA analog supply current − 60 80 mA IDDD digital supply current fclk = 35 MHz − 58mA INL integral non-linearity fclk = 35 MHz; ramp input; Tamb =25 °C −±0.35 ±0.6 LSB DNL differential non-linearity fclk = 35 MHz; ramp input; Tamb =25 °C −±0.35 ±0.6 LSB EB effective bits note 1 − 5.3 − bits fclk maximum clock conversion rate 35 −− MHz Ptot total power dissipation fclk = 35 MHz; note 2 − 335 485 mW TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TDA8707H QFP44 plastic quad flat package; 44 leads; lead length 1.3 mm; body 10 × 10 × 1.75 mm SOT307-2 |
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