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TDA8718 Datasheet(PDF) 8 Page - NXP Semiconductors |
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TDA8718 Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 16 page June 1994 8 Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8718 Notes to the “Characteristics” 1. Voltage offset BOTTOM (VosB) is the difference between the analog input which produces data outputs equal to 00 and the reference voltage BOTTOM (VRB) at Tamb = 25 °C. Voltage offset TOP (VosT) is the difference between reference voltage TOP (VRT) and the analog input which produces data outputs equal to FF, at Tamb =25 °C. 2. The analog input is not internally biased. It should be externally biased between VRT and VRB levels. 3. Full-scale sine wave; fi = 4.43 MHz; fclk = 100 MHz. 4. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 4K acquisition points per period. The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB. 5. TDA8718 can only withstand one or two 100K ECL loads in order to work out timings at the maximum sampling frequency. It is recommended to minimize the printed circuit-board load by implementing the load device as close as possible to the TDA8718. Table 1 Output coding and input voltage (typical values; referenced to AGND. STEP VI O/UF BINARY OUTPUT BITS D5 D4 D3 D2 D1 D0 Underflow <−40 Ω× I RT 1 0 00000 0 −40 Ω× IRT 0 0 00000 1 . 0 0 00001 . . . . .... . . . . ..... . . . . ..... 254 . 0 111110 255 −8 Ω× IRT 0 1 11111 Overflow >−8 Ω× IRT 1 1 11111 Fig.4 Timing diagram. handbook, full pagewidth sample N + 1 sample N CLK MSA666 sample N + 2 50 % DATA OF/UF t ds t h 50 % DATA N + 1 DATA N DATA N - 1 DATA N - 2 V I |
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