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TDA8763 Datasheet(PDF) 8 Page - NXP Semiconductors |
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TDA8763 Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 24 page 1999 Jan 06 8 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator TDA8763 Reference voltages for the resistor ladder using the internal voltage regulator; see Table 1 VRB reference voltage BOTTOM 1.1 1.3 1.5 V VRT reference voltage TOP 3.4 3.6 3.8 V Vdiff differential reference voltage VRT − VRB 2.25 2.3 2.35 V Iref reference current − 9.39 − mA Rlad resistor ladder − 245 −Ω TCRlad temperature coefficient of the resistor ladder − 1860 − ppm − 456 − m Ω/K Voffset(B) offset voltage BOTTOM note 2 − 175 − mV Voffset(T) offset voltage TOP note 2 − 175 − mV Vi(p-p) analog input voltage (peak-to-peak value) note 3 1.90 1.95 2.00 V Outputs DIGITAL OUTPUTS D9 TO D0 AND IR (REFERENCED TO OGND) VOL LOW-level output voltage IOL = 1 mA 0 − 0.5 V VOH HIGH-level output voltage IOH = −1mA VCCO − 0.5 − VCCO V IOZ output current in 3-state mode 0.5V<Vo <VCCO −20 − +20 µA Switching characteristics CLOCK INPUT CLK; see Fig.4; note 1 fclk(max) maximum clock frequency TDA8763M/3 30 −− MHz TDA8763M/4 40 −− MHz TDA8763M/5 50 −− MHz tCPH clock pulse width HIGH full effective bandwidth 8.5 −− ns tCPL clock pulse width LOW full effective bandwidth 5.5 −− ns Analog signal processing LINEARITY INL integral non-linearity fclk = 40 MHz; ramp input −±0.8 ±2.0 LSB DNL differential non-linearity fclk = 40 MHz; ramp input −±0.5 ±0.9 LSB Eoffset offset error middle code −±1 − LSB EG gain error (from device to device) using internal reference voltage note 4 −±3 − % SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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