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TDA8784H Datasheet(PDF) 11 Page - NXP Semiconductors |
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TDA8784H Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 28 page 1999 Sep 21 11 Philips Semiconductors Product specification 18 Msps, 10-bit analog-to-digital interface for CCD cameras TDA8784 Note 1. Noise measurement at ADC outputs: the coupling capacitor at the input is connected to ground, so that only the noise contribution of the front-end is evaluated. The front-end operates at 18 Mpix with a line of 1024 pixels. The first 40 are used to run CLPOB and the last 40 to run CLPDM. Data at the ADC outputs is measured during the other pixels. The differences between the types of codes statistic is then computed; the result is the noise. No quantization noise is taken into account as no signal is input. ZOFDOUT additional 8-bit control DAC (OFD) output impedance − 2000 −Ω IOFDOUT OFD output current drive static −− 50 µA ADC clamp control DAC (see Fig.8) VDACOUT(p-p) ADC clamp 10-bit control DAC output voltage (peak-to-peak value) − 1 − V VDACOUT DC output voltage code 0 − 1.5 − V code 1023 − 2.5 − V ZDACOUT ADC clamp control DAC output impedance −− 250 Ω IDACOUT DAC output current drive static −− 50 µA OFELOOP maximum offset error of DAC + ADC clamp loop code 0 −±5 − LSB code 1023 −±5 − LSB Digital outputs (fCLK = 18 MHz; CL =20pF) VOH HIGH-level output voltage IOH = −1mA VCCO − 0.5 − VCCO V VOL LOW-level output voltage IOL =1mA 0 − 0.5 V IOZ output current in 3-state mode 0V<Vo <VCCO −20 − +20 µA to(h) output hold time see Fig.5 8 −− ns to(d) output delay time Ci = 20 pF; VCCO =5V − 17 23 ns Ci =10pF − 15 21 ns Ci = 20 pF; VCCO =3V − 20 29 ns Ci =10pF − 17 25 ns Ci = 20 pF; VCCO = 2.5 V − 22 33 ns Ci =10pF − 18 28 ns Serial interface fSCLK(max) maximum frequency of serial interface 5 −− MHz SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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