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TEA1202 Datasheet(PDF) 5 Page - NXP Semiconductors

No. de pieza TEA1202
Descripción Electrónicos  Battery power unit
Download  24 Pages
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Fabricante Electrónico  PHILIPS [NXP Semiconductors]
Página de inicio  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TEA1202 Datasheet(HTML) 5 Page - NXP Semiconductors

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2000 Jun 08
5
Philips Semiconductors
Objective specification
Battery power unit
TEA1202TS
PINNING
SYMBOL
PIN
DESCRIPTION
LX1
1
inductor connection 1
SHDWN0
2
DC/DC shut-down input
SHDWN2
3
LDO2 shut-down input
UPOUT/DNIN
4
up mode: DC/DC output;
down mode DC/DC input
ILIM
5
current limiting resistor
connection
OUT1
6
LDO1 output
FB1
7
LDO1 feedback input
GND
8
internal supply ground
FB2
9
LDO2 feedback input
OUT2
10
LDO2 output
IN2
11
LDO2 input
LBI2
12
low battery detector input 2
LBI1
13
low battery detector input 1
LBO
14
low battery detector output
Vref
15
reference voltage
FB0
16
DC/DC feedback input
GND0
17
DC/DC converter ground
SYNC/PWM
18
synchronization clock input or
PWM-only selection input
U/D
19
conversion mode selection input
LX2
20
inductor connection 2
handbook, halfpage
TEA1202TS
MGU060
1
2
3
4
5
6
7
8
9
10
LX1
SHDWN0
SHDWN2
UPOUT/DNIN
ILIM
OUT1
FB1
GND
FB2
OUT2
LX2
U/D
SYNC/PWM
GND0
FB0
Vref
LBO
LBI1
LBI2
IN2
20
19
18
17
16
15
14
13
12
11
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
Control mechanism
The TEA1202TS DC/DC converter is able to operate in
PFM (discontinuous conduction) or PWM (continuous
conduction) operating mode. All switching actions are
completely determined by a digital control circuit which
uses the output voltage level as its control input. This novel
digital approach enables the use of a new pulse width and
frequency modulation scheme, which ensures optimum
power efficiency over the complete range of operation of
the converter.
When high output power is requested, the device will
operate in PWM (continuous conduction) operating mode.
This results in minimum AC currents in the circuit
components and hence optimum efficiency, minimum
costs and low EMC. In this operating mode, the output
voltage is allowed to vary between two predefined voltage
levels. As long as the output voltage stays within this
so-called window, switching continues in a fixed pattern.
When the output voltage reaches one of the window
borders, the digital controller immediately reacts by
adjusting the pulse width and inserting a current step in
such a way that the output voltage stays within the window
with higher or lower current capability. This approach
enables very fast reaction to load variations. Figure 3
shows the response of the converter to a sudden load
increase. The upper trace shows the output voltage.
The ripple on top of the DC level is a result of the current
in the output capacitor, which changes in sign twice per
cycle, times the internal Equivalent Series Resistance
(ESR) of the capacitor. After each ramp-down of the
inductor current, i.e. when the ESR effect increases the
output voltage, the converter determines what to do in the
next cycle. As soon as more load current is taken from the
output the output voltage starts to decay.


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