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TEA6880H Datasheet(PDF) 10 Page - NXP Semiconductors

No. de pieza TEA6880H
Descripción Electrónicos  Up-level Car radio Analog Signal Processor CASP
Download  88 Pages
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Fabricante Electrónico  PHILIPS [NXP Semiconductors]
Página de inicio  http://www.nxp.com
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TEA6880H Datasheet(HTML) 10 Page - NXP Semiconductors

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2000 May 08
10
Philips Semiconductors
Product specification
Up-level Car radio Analog Signal
Processor (CASP)
TEA6880H
7
FUNCTIONAL DESCRIPTION
7.1
Stereo decoder
The MPX input is the null-node of an operational amplifier
with internal feedback resistor. Adapting the stereo
decoder input to the level of the MPX signal, coming from
the FM demodulator output, is realized by the value of the
input series resistor RIN. To this input a second source
(AM detector output) can be fed by current addition.
The input amplifier is followed by an integrated 4th order
Bessel low-pass filter with a cut-off frequency of 80 kHz.
It provides necessary signal delay for FM noise blanking
and damping of high frequency interferences coming to
the stereo decoder input.
Output of this filter is fed to the soft mute control circuitry,
the output is voltage to current converted and then fed to
phase detector, pilot detector and pilot canceller circuits,
contained in the stereo decoder PLL block. For
regeneration of the 38 kHz subcarrier, a PLL is used.
The fully integrated oscillator is adjusted by means of a
digital auxiliary PLL into the capture range of the main PLL.
The auxiliary PLL needs an external reference frequency
(75.4 kHz) which is provided by the TEA6840H.
The required 19 and 38 kHz signals are generated by
division of the oscillator output signal in a logical circuitry.
The 19 kHz quadrature phase signal is fed to the 19 kHz
phase detector, where it is compared with the incoming
pilot tone. The DC output signal of the phase detector
controls the oscillator (PLL).
The pilot presence detector is driven by an internally
generated in-phase 19 kHz signal. Its pilot dependent DC
output voltage is fed to a threshold switch, which activates
the pilot indicator bit and turns the stereo decoder to stereo
operation. The same DC voltage is used to control the
amplitude of an anti-phase internally generated 19 kHz
signal. In the pilot canceller, the pilot tone is compensated
by this anti-phase 19 kHz signal.
The pilot cancelled signal is fed to the matrix. There, the
side signal is demodulated and combined with the main
signal to left and right audio channel. Compensation for
roll-off in the incoming MPX signal caused by IF filters and
FM demodulator is typically realized by an external
compensation network at pin 57, individual alignment is
achieved by I2C-bus controlled amplification of the side
signal (DAA). A smooth mono to stereo takeover is
achieved by controlling the efficiency of the matrix with
help of the SNC peak detector.
The matrix is followed by the FM noise suppression gates,
which are combined with FM single poles and High Cut
Control (HCC). The single pole is defined by internal
resistors and external capacitors. From the gate circuits
audio is fed to the switchable de-emphasis, where the
demodulated AM stereo signal can be fed in. After
de-emphasis the signal passes to the output buffers and is
fed to the radio input of the source selector. For HCC, the
time constant of the single pole contained in the output
buffer can be changed to higher values. This function is
controlled by an average detector contained in the
multipath and fading detector.
7.2
FM noise blanker
The input of the ignition noise blanker is coupled to the
MPXRDS (pin 55) input signal and to the IF level input
(pin 3). Both signals are fed via separate 120 kHz filters
and rectifiers to an adder circuit. The output signal of the
adder circuit is fed in parallel to the noise detector and the
interference detector. The noise detector is a negative
peak detector. Its output controls the trigger sensitivity
(prevention to false triggering at noisy input signals) and
the gain of the MPX high-pass filter. The output of the
interference detector, when receiving a steep pulse, fires a
monoflop, contained in the pulse former circuitry. The time
constant of the monoflop is defined by an internal capacitor
and its output activates the blanking gates in the audio.
7.3
AM noise blanker
The AM noise blanking pulse is derived from the AM audio
signal which is fed into pin 53 with the help of a
peak-to-average comparator. The blanking time is set by a
pulse former with external capacitor. The blanking pulse is
fed to the gate in the AM audio path and out to pin
AMHOLD to operate the gate built into the external
AM stereo processor.
7.4
Multipath/fading detection and weak signal
control
For FM signal quality dependent controls there is built-in a
combination of six detectors driven by the level information
direct, by the AC components on the level via a 20 kHz
band-pass filter (AM wideband) or the high notes present
at the FM demodulator output via a 60 kHz high-pass filter
(ultrasonic noise). The relation between DC level and the
AC components is programmable by the I2C-bus (2 bits
each). Output of level buffer, AM wideband detector and
ultrasonic noise detector are analog-to-digital converted
and readable by the I2C-bus.


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