AD7699 datasheet(6/20 Pages) AD

No. de pieza	AD7699

Descripción Electrónicos	16-Bit, 8-Channel, 250 kSPS PulSAR짰 ADC.

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Fabricante Electrónico	AD [Analog Devices]

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AD7689

Preliminary Technical Data

Rev. PrC | Page 6 of 20

VDD = 2.5 V to 4.5 V, VIO = 2.3 V to VDD, all specifications TMIN to TMAX, unless otherwise noted.

Table 5. 1

Parameter

Symbol

Min

Typ

Max

Unit

Conversion Time: CNV Rising Edge to Data Available

tCONV

0.7

3.2

μs

Acquisition Time

tACQ

1.8

μs

Time Between Conversions

tCYC

5

μs

CNV Pulse Width

tCNVH

10

ns

SCK Period

tSCK

25

ns

SCK Low Time

tSCKL

12

ns

SCK High Time

tSCKH

12

ns

SCK Falling Edge to Data Remains Valid

tHSDO

5

ns

SCK Falling Edge to Data Valid Delay

tDSDO

VIO Above 3 V

24

ns

VIO Above 2.7 V

30

ns

VIO Above 2.3 V

35

ns

CNV Low to SDO D15 MSB Valid

tEN

VIO Above 2.7 V

18

ns

VIO Above 2.3 V

22

ns

CNV High or Last SCK Falling Edge to SDO High Impedance

tDIS

25

ns

CNV High to SCK Low

tCSCK

10

ns

SDI Valid Setup Time from SCK Falling Edge

tSDIN

5

ns

SDI Valid Hold Time from SCK Falling Edge

tHDIN

4

ns

1 See Figure 2 and Figure 3 for load conditions.

500µA

IOL

500µA

IOH

1.4V

TO SDO

CL

50pF

Figure 2. Load Circuit for Digital Interface Timing

30% VIO

70% VIO

2V OR VIO – 0.5V1

0.8V OR 0.5V2

2V OR VIO – 0.5V1

tDELAY

1. 2V IF VIO ABOVE 2.5V, VIO – 0.5V IF VIO BELOW 2.5V.

2. 0.8V IF VIO ABOVE 2.5V, 0.5V IF VIO BELOW 2.5V.

Figure 3. Voltage Levels for Timing

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