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FM3130-G Datasheet(PDF) 6 Page - Ramtron International Corporation |
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FM3130-G Datasheet(HTML) 6 Page - Ramtron International Corporation |
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6 / 22 page  FM3130 Integrated RTC/Alarm with 64Kb FRAM Rev. 1.0 Sept. 2006 Page 6 of 22 24 511.9478 511.9456 102.00 106.33 111000 25 511.9456 511.9433 106.34 110.67 111001 26 511.9433 511.9411 110.68 115.01 111010 27 511.9411 511.9389 115.02 119.35 111011 28 511.9389 511.9367 119.36 123.69 111100 29 511.9367 511.9344 123.70 128.03 111101 30 511.9344 511.9322 128.04 132.37 111110 31 511.9322 511.9300 132.38 136.71 111111 Negative Calibration for fast clocks: Calibration will achieve ± 2.17 PPM after calibration Measured Frequency Range Error Range (PPM) Min Max Min Max Program Calibration Register to: 0 512.0000 512.0011 0 2.17 000000 1 512.0011 512.0033 2.18 6.51 000001 2 512.0033 512.0056 6.52 10.85 000010 3 512.0056 512.0078 10.86 15.19 000011 4 512.0078 512.0100 15.20 19.53 000100 5 512.0100 512.0122 19.54 23.87 000101 6 512.0122 512.0144 23.88 28.21 000110 7 512.0144 512.0167 28.22 32.55 000111 8 512.0167 512.0189 32.56 36.89 001000 9 512.0189 512.0211 36.90 41.23 001001 10 512.0211 512.0233 41.24 45.57 001010 11 512.0233 512.0256 45.58 49.91 001011 12 512.0256 512.0278 49.92 54.25 001100 13 512.0278 512.0300 54.26 58.59 001101 14 512.0300 512.0322 58.60 62.93 001110 15 512.0322 512.0344 62.94 67.27 001111 16 512.0344 512.0367 67.28 71.61 010000 17 512.0367 512.0389 71.62 75.95 010001 18 512.0389 512.0411 75.96 80.29 010010 19 512.0411 512.0433 80.30 84.63 010011 20 512.0433 512.0456 84.64 88.97 010100 21 512.0456 512.0478 88.98 93.31 010101 22 512.0478 512.0500 93.32 97.65 010110 23 512.0500 512.0522 97.66 101.99 010111 24 512.0522 512.0544 102.00 106.33 011000 25 512.0544 512.0567 106.34 110.67 011001 26 512.0567 512.0589 110.68 115.01 011010 27 512.0589 512.0611 115.02 119.35 011011 28 512.0611 512.0633 119.36 123.69 011100 29 512.0633 512.0656 123.70 128.03 011101 30 512.0656 512.0678 128.04 132.37 011110 31 512.0678 512.0700 132.38 136.71 011111 Alarm The alarm function compares user-programmed alarm values to the corresponding RTC time/date values. When a match occurs, an alarm event occurs. The alarm event sets an internal flag AF (register 00h, bit 6) and drives the ACS pin low, if the appropriate control bits are set in registers 00h and 0Eh. See Table 3. The alarm condition on the ACS pin and the AF bit are cleared by reading register 00h. The alarm operates under VDD or VBAK power. If the system controller is being used to detect an alarm while the FM3130 is powered on VBAK only, the ACS pin may cause extra IBAK current when the alarm is activated. To avoid battery drain, the ACS pin can be tri-stated by reading the AF flag, located in the RTC/Alarm Control register 00h. There are five alarm match fields. They are Month, Date, Hours, Minutes, and Seconds. Each of these fields also has a Match bit that is used to determine if the field is used in the alarm match logic. Setting the Match bit to ‘0’ indicates that the corresponding field will be used in the match process. Depending on the Match bits, the alarm can occur as specifically as one particular second on one day of the month, or as frequently as once per second continuously. The MSB of each Alarm register is a Match bit. Examples of the Match bit settings are shown in Table 4. Alarm Match Bit Examples. Selecting none of the match bits (all ‘1’s) indicates that no match is required. The alarm occurs every |
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