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TLC374CDRG4 Datasheet(PDF) 7 Page - Texas Instruments |
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TLC374CDRG4 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 28 page TLC374, TLC374Q, TLC374Y LinCMOS QUADRUPLE DIFFERENTIAL COMPARATORS SLCS118C – NOVEMBER 1983 – REVISED MARCH 1999 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION The digital output stage of the TLC374 can be damaged if it is held in the linear region of the transfer curve. Conventional operational amplifier/comparator testing incorporates the use of a servo loop that is designed to force the device output to a level within this linear region. Since the servo-loop method of testing cannot be used, the following alternative for measuring parameters such as input offset voltage, common-mode rejection, etc., are offered. To verify that the input offset voltage falls within the limits specified, the limit value is applied to the input as shown in Figure 1(a). With the noninverting input positive with respect to the inverting input, the output should be high. With the input polarity reversed, the output should be low. A similar test can be made to verify the input offset voltage at the common-mode extremes. The supply voltages can be slewed as shown in Figure 1(b) for the VICR test, rather than changing the input voltages, to provide greater accuracy. A close approximation of the input offset voltage can be obtained by using a binary search method to vary the differential input voltage while monitoring the output state. When the applied input voltage differential is equal, but opposite in polarity to the input offset voltage, the output changes state. 5 V 5.1 k Ω (a) VIO WITH VIC = 0 (b) VIO WITH VIC = 4 V Applied VIO Limit VO 1 V Applied VIO Limit VO 5.1 k Ω – 4 V Figure 1. Method for Verifying That Input Offset Voltage is Within Specified Limits |
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