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SN74ALVC32PWR Datasheet(PDF) 1 Page - Texas Instruments

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No. de pieza SN74ALVC32PWR
Descripción Electrónicos  QUADRUPLE 2-INPUT POSITIVE-OR GATE
Download  13 Pages
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

SN74ALVC32PWR Datasheet(HTML) 1 Page - Texas Instruments

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FEATURES
D, DGV, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
DESCRIPTION/ORDERING INFORMATION
The SN74ALVC32 performs the Boolean function Y = A ⋅ B or Y = A + B in positive logic.
A
B
Y
SN74ALVC32
QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCES108G – JULY 1997 – REVISED NOVEMBER 2004
Operates From 1.65 V to 3.6 V
Max tpd of 2.8 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
This quadruple 2-input positive-OR gate is designed for 1.65-V to 3.6-V VCC operation.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
Tube
SN74ALVC32D
SOIC - D
ALVC32
Tape and reel
SN74ALVC32DR
SOP - NS
Tape and reel
SN74ALVC32NSR
ALVC32
-40
°C to 85°C
Tube
SN74ALVC32PW
TSSOP - PW
VA32
Tape and reel
SN74ALVC32PWR
TVSOP - DGV
Tape and reel
SN74ALVC32DGVR
VA32
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
H
X
H
X
H
H
L
L
L
LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1997–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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