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ST1S10PUR Datasheet(PDF) 10 Page - STMicroelectronics

No. de pieza ST1S10PUR
Descripción Electrónicos  3 A, 900 kHz, monolithic synchronous step-down regulator
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST1S10PUR Datasheet(HTML) 10 Page - STMicroelectronics

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Application information
ST1S10
10/26
The use of ceramic capacitors with voltage ratings in the range of 1.5 times the maximum
output voltage is recommended.
5.4
Output capacitor (0.8 V < VOUT < 2.5 V)
For applications with lower output voltage levels (Vout < 2.5 V) the output capacitance and
inductor values should be selected in a way that improves the DC-DC control loop behavior.
In this output condition two cases must be considered: VIN > 8 V and VIN < 8 V.
For VIN < 8 V the use of 2 x 22 µF capacitors in parallel to the output is recommended, as
shown in Figure 4.
For VIN > 8 V, a 100 µF electrolytic capacitor with ESR < 0.1 Ω should be added in parallel to
the 2 x 22 µF output capacitors as shown in Figure 5.
5.5
Output voltage selection
The output voltage can be adjusted from 0.8 V up to 85% of the input voltage level by
connecting a resistor divider (see R1 and R2 in the typical application circuit) between the
output and the VFB pin. A resistor divider with R2 in the range of 20 kΩ is a suitable
compromise in terms of current consumption. Once the R2 value is selected, R1 can be
calculated using the following equation:
R1 = R2 x (VOUT - VFB) / VFB
where VFB = 0.8 V (typ.).
Lower values are suitable as well, but will increase current consumption. Be aware that duty
cycle must be kept below 85% at all application conditions, so that:
D = (VOUT + VF) / (VIN-VSW) < 0.85
where VF is the voltage drop across the internal NMOS, and VSW represents the voltage
drop across the internal PDMOS.
Note that once the output current is fixed, higher VOUT levels increase the power dissipation
of the device leading to an increase in the operating junction temperature. It is
recommended to select a VOUT level which maintains the junction temperature below the
thermal shut-down protection threshold (150°C typ.) at the rated output current. The
following equation can be used to calculate the junction temperature (TJ):
TJ = {[VOUT x IOUT x RthJA x (1-η)] / η} +TAMB
where RthJA is the junction-to-ambient thermal resistance, η is the efficiency at the rated
IOUT current and TAMB is the ambient temperature.
To ensure safe operating conditions the application should be designed to keep TJ < 140°C.
5.6
Inductor (VOUT > 2.5 V)
The inductor value fixes the ripple current flowing through output capacitor and switching
peak current. The ripple current should be kept in the range of 20-40% of IOUT_MAX (for
example it is 0.6 - 1.2 A at IOUT = 3 A). The approximate inductor value can be obtained with
the following formula:
L = [(VIN - VOUT) / ΔISW] x TON


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