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74ALVC573PW Datasheet(PDF) 9 Page - NXP Semiconductors |
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74ALVC573PW Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 17 page 74ALVC573_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 26 October 2007 9 of 17 NXP Semiconductors 74ALVC573 Octal D-type transparent latch; 3-state 11. Waveforms Measurement points are given in Table 8. VOL and VOH are the typical output voltage levels that occur with the output load. Fig 8. Input Dn to output Qn propagation delay times mna811 Dn input Qn output tPHL tPLH GND VI VM VM VOH VOL Table 8. Measurement points Supply voltage VCC VM Output VX VY 1.65 V to 1.95 V 0.5VCC VOL + 0.15 V VOH − 0.15 V 2.3 V to 2.7 V 0.5VCC VOL + 0.15 V VOH − 0.15 V 2.7 V 1.5 V VOL + 0.3 V VOH − 0.3 V 3.0 V to 3.6 V 1.5 V VOL + 0.3 V VOH − 0.3 V Measurement points are given in Table 8. VOL and VOH are the typical output voltage levels that occur with the output load. Fig 9. Latch enable (LE) pulse width and latch enable input to output (Qn) propagation delays mna812 LE input Qn output tPHL tPLH tW 1/fmax VM VOH VI GND VOL VM |
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