74AUP1G00_2

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.

Product data sheet

Rev. 02 — 29 June 2006

7 of 16

Philips Semiconductors

74AUP1G00

Low-power 2-input NAND gate

11. Dynamic characteristics

Table 8.

Dynamic characteristics

Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8

Symbol

Parameter

Conditions

Min

Typ [1]

Max

Unit

HIGH-to-LOW and

LOW-to-HIGH

propagation delay A or B to Y

see Figure 7

-

17.5

-

ns

2.5

5.3

11.0

ns

2.0

3.8

6.8

ns

1.6

3.1

5.3

ns

1.3

2.5

4.0

ns

1.0

2.2

3.6

ns

HIGH-to-LOW and

LOW-to-HIGH

propagation delay A or B to Y

see Figure 7

-

21.0

-

ns

2.4

6.1

13.0

ns

2.4

4.4

7.9

ns

2.0

3.7

6.2

ns

1.4

3.0

4.7

ns

1.3

2.8

4.3

ns

HIGH-to-LOW and

LOW-to-HIGH

propagation delay A or B to Y

see Figure 7

-

24.5

-

ns

3.4

6.9

14.8

ns

2.8

5.0

8.9

ns

2.0

4.1

7.0

ns

1.7

3.5

5.3

ns

1.6

3.2

4.9

ns

HIGH-to-LOW and

LOW-to-HIGH

propagation delay A or B to Y

see Figure 7

-

34.8

-

ns

4.6

9.2

20.1

ns

3.0

6.5

11.8

ns

2.6

5.4

9.3

ns

2.4

4.6

7.1

ns

2.3

4.3

6.5

ns