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TC74HCT573AF Datasheet(PDF) 4 Page - Toshiba Semiconductor |
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TC74HCT573AF Datasheet(HTML) 4 Page - Toshiba Semiconductor |
4 / 7 page TC74HCT573AP/AF 2007-10-01 4 Timing Requirements (input: tr = tf = 6 ns) Test Condition Ta = 25°C Ta = −40 ~85°C Characteristics Symbol VCC (V) Typ. Limit Limit Unit Minimum pulse width (LE) tW (H) ⎯ 4.5 5.5 ⎯ ⎯ 15 14 19 17 ns Minimum set-up time (data) ts ⎯ 4.5 5.5 ⎯ ⎯ 10 9 13 11 ns Minimum hold time (data) th ⎯ 4.5 5.5 ⎯ ⎯ 5 5 5 5 ns AC Characteristics (input: tr = tf = 6 ns) Test Condition Ta = 25°C Ta = −40~85°C Characteristics Symbol CL (pF) VCC (V) Min Typ. Max Min Max Unit Output transition time tTLH tTHL ⎯ 50 4.5 5.5 ⎯ ⎯ 7 6 12 11 ⎯ ⎯ 15 14 ns 50 4.5 5.5 ⎯ ⎯ 19 17 29 26 ⎯ ⎯ 36 33 Propagation delay time (LE-Q) tpLH tpHL ⎯ 150 4.5 5.5 ⎯ ⎯ 24 22 37 34 ⎯ ⎯ 46 43 ns 50 4.5 5.5 ⎯ ⎯ 17 14 26 23 ⎯ ⎯ 33 29 Propagation delay time (D-Q) tpLH tpHL ⎯ 150 4.5 5.5 ⎯ ⎯ 22 20 34 31 ⎯ ⎯ 43 39 ns 50 4.5 5.5 ⎯ ⎯ 18 15 27 24 ⎯ ⎯ 34 30 Output enable time tpZL tpZH RL = 1 kΩ 150 4.5 5.5 ⎯ ⎯ 23 20 35 32 ⎯ ⎯ 44 40 ns Output disable time tpLZ tpHZ RL = 1 kΩ 50 4.5 5.5 ⎯ ⎯ 18 16 24 22 ⎯ ⎯ 30 28 ns Input capacitance CIN ⎯ ⎯ 5 10 ⎯ 10 pF Output capacitance COUT ⎯ ⎯ 10 ⎯ ⎯ ⎯ pF Power dissipation capacitance CPD (Note) ⎯ ⎯ 38 ⎯ ⎯ ⎯ pF Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD・VCC・fIN + ICC And the total CPD when n pcs. of latch operate can be gained by the following equation: CPD (total) = 25 + 13・n |
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