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ISL59451IRZ-T7 Datasheet(PDF) 4 Page - Intersil Corporation |
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ISL59451IRZ-T7 Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 17 page 4 FN6253.0 September 24, 2007 Settling Time Diagram SWITCHING CHARACTERISTICS VGLITCH HIZ High to Low Switching Glitch VIN = 1V, RL = 150Ω; CL = 2.1pF, GAIN = 1 500 mVP-P VIN = 1V, RL = 150Ω; CL = 2.1pF, GAIN = 2 300 mVP-P tSW-L-H Channel Switching Delay Time Low to High 1.2V logic threshold to 10% movement of analog output 3ns tSW-H-L Channel Switching Delay Time High to Low 1.2V logic threshold to 10% movement of analog output 4ns tHIZ-L-H HIZ Switching Delay Time Low to High 1.2V logic threshold to 10% movement of analog output 25 ns tHIZ-H-L HIZ Switching Delay Time High to Low 1.2V logic threshold to 10% movement of analog output 220 ns tpd Propagation Delay 10% input to 10% output 2.5 ns tHE Time to Enable CLAMP CLAMP = LOW to settled output 40 ns tHD Time to Disable CLAMP CLAMP = HIGH to settled output 20 ns Electrical Specifications V+ = +5V, GND = 0V, TA = +25°C, RL = 150Ω to GND, REF_G = 0.5V, REF_RB = 1.2V, CLAMP = 2.0V, S1 = S0 = AV2 = HIZ = 0.8V, unless otherwise specified. (Continued) PARAMETER DESCRIPTION CONDITIONS MIN (Note 2) TYP MAX (Note 2) UNIT FINAL VALUE 90% FINAL VALUE 10% FINAL VALUE tR tS 1% ±1% OF FINAL VALUE BAND ISL59451 |
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