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CD74HC03MT Datasheet(PDF) 4 Page - Texas Instruments |
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CD74HC03MT Datasheet(HTML) 4 Page - Texas Instruments |
4 / 13 page 4 Low Level Output Voltage CMOS Loads VOL VIH or VIL 0.02 4.5 - - 0.1 - 0.1 - 0.1 V Low Level Output Voltage TTL Loads 4 4.5 - - 0.26 - 0.33 - 0.4 V Input Leakage Current II VCC and GND - 5.5 - ±0.1 - ±1- ±1 µA Quiescent Device Current ICC VCC or GND 0 5.5 - - 2 - 20 - 40 µA Additional Quiescent Device Current Per Input Pin: 1 Unit Load ∆ICC (Note 4) VCC - 2.1 - 4.5 to 5.5 - 100 360 - 450 - 490 µA NOTE: 4. For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA. DC Electrical Specifications (Continued) PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -40oC TO 85oC -55oC TO 125oC UNITS VI (V) IO (mA) MIN TYP MAX MIN MAX MIN MAX HCT Input Loading Table INPUT UNIT LOADS nA, nB 1 NOTE: Unit Load is ∆ICC limit specified in DC Electrical Specifica- tions table, e.g., 360 µA max at 25oC. Switching Specifications Input tr, tf = 6ns PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -40oC TO 85oC -55oC TO 125oC UNITS MIN TYP MAX MIN MAX MIN MAX HC TYPES Propagation Delay, Input to Output (Figure 1) tPLH, tPHL CL = 50pF 2 - - 100 - 125 - 150 ns 4.5 - - 20 - 25 - 30 ns 6 - - 17 - 21 - 26 ns Propagation Delay, Data Input to Output Y tPLH, tPHL CL = 15pF 5 - 8 - ---- ns Transition Times (Figure 1) tTLH, tTHL CL = 50pF 2 - - 75 - 95 18 110 ns 4.5 - - 15 - 19 - 22 ns 6 - - 13 - 16 - 19 ns Input Capacitance CI - - - - 10 - 10 - 10 pF Power Dissipation Capacitance (Notes 5, 6) CPD - 5 - 6.4 - ---- pF HCT TYPES Propagation Delay, Input to Output (Figure 1) tPLH, tPHL CL = 50pF 4.5 - - 24 - 30 - 36 ns Propagation Delay, Data Input to Output Y tPLH, tPHL CL = 15pF 5 - 9 - ---- ns Transition Times (Figure 1) tTLH, tTHL CL = 50pF 4.5 - - 15 - 19 - 22 ns Input Capacitance CI - - - - 10 - 10 - 10 pF CD54HC03, CD74HC03, CD54HCT03, CD74HCT03 |
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