© Semiconductor Components Industries, LLC, 2001

October, 2001 – Rev. 7

1

Publication Order Number:

SN74LS76A/D

SN74LS76A

Dual JK Flip-Flop

with Set and Clear

The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and

Direct Clear inputs. These dual flip-flops are designed so that when

the clock goes HIGH, the inputs are enabled and data will be accepted.

The Logic Level of the J and K inputs will perform according to the

Truth Table as long as minimum set-up times are observed. Input data

is transferred to the outputs on the HIGH-to-LOW clock transitions.

MODE SELECT – TRUTH TABLE

OPERATING

INPUTS

OUTPUTS

OPERATING

MODE

SD

CD

J

K

Q

Q

Set

Reset (Clear)

*Undetermined

Toggle

Load “0” (Reset)

Load “1” (Set)

Hold

L

H

L

H

H

H

H

H

L

L

H

H

H

H

X

X

X

h

l

h

l

X

X

X

h

h

l

l

H

L

H

q

L

H

q

L

H

H

q

H

L

q

*

Both outputs will be HIGH while both SD and CD are LOW, but the output

states are unpredictable if SD and CD go HIGH simultaneously.

H, h = HIGH Voltage Level

L, I = LOW Voltage Level

X = Immaterial

l, h (q) = Lower case letters indicate the state of the referenced input

GUARANTEED OPERATING RANGES

Symbol

Parameter

Min

Typ

Max

Unit

VCC

Supply Voltage

4.75

5.0

5.25

V

TA

Operating Ambient

Temperature Range

0

25

70

°C

IOH

Output Current – High

–0.4

mA

IOL

Output Current – Low

8.0

mA

LOW

POWER

SCHOTTKY

SOIC

D SUFFIX

CASE 751B

PLASTIC

N SUFFIX

CASE 648

16

1

16

1

Device

Package

Shipping

ORDERING INFORMATION

SN74LS76AN

16 Pin DIP

2000 Units/Box

SN74LS76AD

SOIC–16

38 Units/Rail

SN74LS76ADR2

SOIC–16

2500/Tape & Reel

http://onsemi.com