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1OE

1CLK

1D1

To Seven Other Channels

1Q1

2OE

2CLK

2D1

2Q1

To Seven Other Channels

1

48

47

24

25

36

C1

1D

13

2

C1

1D

Pin numbers shown are for the DGG, DL, and WD packages.

Absolute Maximum Ratings

(1)

SN54ALVTH16374,, SN74ALVTH16374

2.5-V/3.3-V 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCES068G – JUNE 1996 – REVISED NOVEMBER 2006

LOGIC DIAGRAM (POSITIVE LOGIC)

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

–0.5

4.6

V

–0.5

7

V

–0.5

7

V

–0.5

7

V

96

Output current in the low state

mA

SN74ALVTH16374

128

–48

Output current in the high state

mA

SN74ALVTH16374

–64

Input clamp current

–50

mA

Output clamp current

–50

mA

DGG package

89

θ

JA

DGV package

93

°C/W

DL package

94

–65

150

°C

(1)

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating

conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

(3)

Product preview

(4)

The package thermal impedance is calculated in accordance with JESD 51.

4

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