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ST52T430K1M6 Datasheet(PDF) 8 Page - STMicroelectronics |
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ST52T430K1M6 Datasheet(HTML) 8 Page - STMicroelectronics |
8 / 88 page ST52T430/E430 8/88 pin in order to start EPROM programming. A signal applied to PB1 is used to increment the memory address; the data is supplied to PORT A (see EPROM programming for further details). 1.2.2 Working mode. Below are the control signals of this mode: The processor starts the working phase following the instructions, which have been previously loaded in the memory. S T 52 x 4 3 0 ’ s i n t e rna l s t ruc t ure i n c l ud es a computational block, CONTROL UNIT (CU) / DATA PROCESSING UNIT (DPU), which allows pro ces sin g of b oo le an fu ncti on s an d fuzz y algorithms. The CU/DPU can manage up to 334 different M e m bersh i p F unc ti ons fo r the f u zz y ru l e s antecedent part. The rule consequents are “crisp” values (real numbers). The maximum number of rul es that ca n be defined i s l im ited by th e di m e n s i o n s of the i m pl em e n t e d s t a n d a r d algorithm. EPR OM i s th en sh are d be tw ee n fuzzy an d standard algorithms. The Membership Function data is stored inside the fi rst 1024 mem ory locations. The Fuzzy rules are parts of the program instructions. The Control Unit (CU) reads the information and the status deriving from the peripherals. Arithmetic calculus can be performed on these values by using the internal CU and the 128/256 bytes of RAM, which supports all computations. The peripheral input can be fuzzy and/or arithmetic output, or the values contained in Data RAM and EPROM locations. Figure 1.1 TQFP32 Pin Configuration RESET TEST VPP VDD VSS VSS INT / PC0 T0OUT / PC1 T1OUT / PC2 T2OUT / PC3 TX / PC4 RX / PC5 PC6 PC7 PB6 / AIN6 PA7 / PB7 / AIN7 PA6 PA5 / T0CLK PA4 / STRT PA3 / T2OUT PA2 / T1OUT PA1 / T0OUT 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 |
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