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ST63156 Datasheet(PDF) 11 Page - STMicroelectronics |
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ST63156 Datasheet(HTML) 11 Page - STMicroelectronics |
11 / 86 page The Core of the ST631xx Family is implemented independently from the I/O or memory configura- tion. Consequently, it can be treated as an inde- pendent central processor communicating with I/O and memory via internal addresses, data, and con- trol busses. The in-core communication is ar- ranged as shown in the following block diagram figure; the controller being externally linked to both the reset and the oscillator, while the core is linked to the dedicated on-chip macrocells peripherals via the serial data bus and indirectly for interrupt pur- poses through the control registers. Registers The ST631xx Family Core has six registers and three pairs of flags available to the programmer. They are shown in Figure 5 and are explained in the following paragraphs together with the pro- gram and data memory page registers. Accumulator (A). The accumulator is an 8-bit general purpose register used in all arithmetic cal- culations, logical operations, and data manipula- tions. The accumulator is addressed in the data space as RAM location at address FFh . Accordingly, the ST631xx instruction set can use the accumulator as any other register of the data space. VR001811 PROGRAM ROM/EPROM RESET OPCODE FLAG VALUES CONTROL SIGNALS 12 FLAGS ALU A-DATA B-DATA 2 256 DATA SPACE DATA RAM / EEPROM DATA ACCUMULATOR INTERRUPTS RESULTS TO DATA SPACE ( WRITE LINE ) 0,0 1 TO 8MHz ADDRESS / READ LINE DEDICATIONS CONTROLLER ROM / EPROM OS Cin OSCout ADDRESS DECODER Progr am Counter and 6 LAYER STACK Figure 4. ST631xx Core Block Diagram SHORT DIRECT ADDRESSING MODE V REGISTER W REGISTER PROGRAM COUNTER SIX LEVELS STACK REGISTER C C C Z Z Z NORMAL FLAGS INTERRUPT FLAGS NMI FLAGS INDEX REGISTER VA000423 b7 b7 b7 b7 b7 b0 b0 b0 b0 b0 b0 b11 ACCUMULATOR Y REG. POINTER X REG. POINTER Figure 5. ST631xx Core Programming Model ST631xx CORE ® ST63140,142,126,156 7/82 |
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