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ST7263BK2B1 Datasheet(PDF) 4 Page - STMicroelectronics

No. de pieza ST7263BK2B1
Descripción Electrónicos  LOW SPEED USB 8-BIT MCU FAMILY WITH FLASH/ROM, UP TO 512 BYTES RAM, 8-BIT ADC, WDG, TIMER, SCI & I짼C
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7263BK2B1 Datasheet(HTML) 4 Page - STMicroelectronics

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ST7263B
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1 INTRODUCTION
The ST7263B Microcontrollers form a sub-family
of the ST7 MCUs dedicated to USB applications.
The devices are based on an industry-standard 8-
bit core and feature an enhanced instruction set.
They operate at a 24 MHz or 12 MHz oscillator fre-
quency. Under software control, the ST7263B
MCUs may be placed in either Wait or Halt modes,
thus reducing power consumption. The enhanced
instruction set and addressing modes afford real
programming potential. In addition to standard 8-
bit data management, the ST7263B MCUs feature
true bit manipulation, 8x8 unsigned multiplication
and indirect addressing modes. The devices in-
clude an ST7 Core, up to 16 Kbytes of program
memory, up to 512 bytes of RAM, 19 I/O lines and
the following on-chip peripherals:
– USB low speed interface with 3 endpoints with
programmable in/out configuration using the
DMA architecture with embedded 3.3V voltage
regulator and transceivers (no external compo-
nents are needed).
– 8-bit Analog-to-Digital converter (ADC) with 8
multiplexed analog inputs
– Industry standard asynchronous SCI serial inter-
face (not on all products - see Table 1 Device
Summary)
– Watchdog
– 16-bit Timer featuring an External clock input, 2
Input Captures, 2 Output Compares with Pulse
Generator capabilities
– Fast I²C Multi Master interface (not on all prod-
ucts - see device summary)
– Low voltage reset (LVD) ensuring proper power-
on or power-off of the device
The ST7263B devices are ROM versions.
The ST72P63B devices are Factory Advanced
Service Technique ROM (FASTROM) versions:
they are factory-programmed and are not repro-
grammable.
The ST72F63B devices are Flash versions. They
support programming in IAP mode (In-application
programming) via the on-chip USB interface.
Figure 1. General Block Diagram
8-BIT CORE
ALU
OSCIN
OSCOUT
RESET
PORT B
16-BIT TIMER
PORT A
PORT C
PB[7:0]
(8 bits)
PC[2:0]
(3 bits)
OSCILLATOR
INTERNAL
CLOCK
CONTROL
RAM
(384/512 Bytes)
PA[7:0]
(8 bits)
VSS
VDD
POWER
SUPPLY
SCI*
PROGRAM
(4K/8K/16K Bytes)
I²C*
MEMORY
ADC
(UART)
USB SIE
OSC/3
LVD
WATCHDOG
VSSA
VDDA
VPP/TEST
USB DMA
USBDP
USBDM
USBVCC
OSC/4 or OSC/2
(for USB)
* Not on all products (refer to Table 1: Device Summary)


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