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ST7291L6 Datasheet(PDF) 4 Page - STMicroelectronics |
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ST7291L6 Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 5 page 4/5 ST72E91L ST72T91L 1 GENERAL DESCRIPTION 1.1 INTRODUCTION The ST72E91 and ST72T91 devices form part of the ST 7 family of Microcontrollers, designed and produced by SGS-THOMSON Microelectronics using an n-well proprietary HCMOS process. The ST72E91 is equipped with internal EPROM mem- ory and is available in windowed ceramic package, whereas the ST72T91 OTP version is available in a plastic package. The EPROM parts are fully compatible with their ROM versions and the present Datasheet will thus provide only informa- tion specifically relating to the EPROM devices. PLEASE REFER TO THE ST7291 DATASHEET FOR THE ROM DEVICES FOR FULL DETAILS. The ST72E91 is a user programmable and erasa- ble device, best suited for development purposes. The ST72T91 is a One-Time Programmable de- vice (OTP) which offers the best cost/flexibility trade-off for prototyping, pre-production and most low to medium volume applications. Both devices are based around an industry stand- ard 8-bit core and offer an enhanced instruction set. The processors will run at an 8MHz clock rate with a 5V supply, and at up to 4MHz with a 3V supply. Since the design is fully static, operation down to DC is possible and the devices may be placed in HALT or WAIT modes under program control in order to reduce power requirements. The powerful enhanced instruction set and ad- dressing modes afford real programming potential. In addition to standard 8-bit data management, the ST72E91 and the ST72T91 feature true bit manip- ulation, 8x8 unsigned multiplication and indirect addressing modes. The devices include a CPU, an on-chip oscillator, EPROM, RAM, I/O, and a timer with output compare system. Figure 2. ST72E91 Block Diagram OSCILLATOR PORT A PORT B CARRIER FREQ. 8 BIT CORE PA0..PA7 (8-bit) PB0..PB7 (8-bit) PC0,PC1,PC5,PC6,PC7 PORT C VDD LOW VOLTAGE DETECTOR TIMER SYSTEM VPP CONTR OL Internal CLOCK EPROM/OTP 32K RAM 256/384 GENERATOR OSCout OSCin WKP RESET |
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