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ST92F120JV9Q Datasheet(PDF) 1 Page - STMicroelectronics

No. de pieza ST92F120JV9Q
Descripción Electrónicos  8/16-BIT FLASH MCU FAMILY WITH RAM, EEPROM AND J1850 BLPD
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST92F120JV9Q Datasheet(HTML) 1 Page - STMicroelectronics

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January 2000
1/320
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Rev. 2.1
ST92F120
8/16-BIT FLASH MCU FAMILY
WITH RAM, EEPROM AND J1850 BLPD
PRELIMINARY DATA
s
Register oriented 8/16 bit CORE with RUN,
WFI, SLOW, HALT and STOP modes
s
0 - 24 MHz Operation (internal Clock), 4.5 - 5.5
Volt voltage range
s
PLL Clock Generator (3-5 MHz crystal)
s
-40oC to 105oC or -40oCto 85oC temperature
range
s
Minimum instruction time: 83 ns (24 MHz
internal clock)
s
Internal Memory: Single Voltage FLASH up to
128 Kbytes, RAM 1.5 to 4 Kbytes, EEPROM
512 to 1K bytes
s
224 general purpose registers (register file)
available as RAM, accumulators or index
pointers
s
TQFP64 or PQFP100 package
s
DMA controller for reduced processor overhead
s
48 (77 on PQFP100 version) I/O pins
s
4 external fast interrupts + 1 NMI
s
Up to 16 pins programmable as wake-up or
additional external interrupt with multi-level
interrupt handler
s
16-bit Timer with 8 bit Prescaler, able to be
used as a Watchdog Timer with a large range of
service
time
(HW/SW
enabling
through
dedicated pin)
s
16-bit Standard Timer that can be used to
generate a time base independent of PLL Clock
Generator
s
Two 16-bit independent Extended Function
Timers (EFTs) with Prescaler, 2 Input Captures
and two Output Compares (PQFP100 only)
s
Two 16-bit Multifunction Timers, with Prescaler,
2 Input Captures and two Output Compares
s
8-bit Analog to Digital Converter allowing up to 8
input channels on TQFP64 or 16 input channels
on PQFP100
s
One or two Serial Communications Interfaces
with
asynchronous
and
synchronous
capabilities.
Software
Management
and
synchronous mode supported
s
Serial Peripheral Interface (SPI) with Selectable
Master/Slave mode
s
J1850 Byte Level Protocol Decoder (JBLPD)
(on some versions only)
s
Full
I2C
multiple
Master/Slave
Interface
supporting ACCESS BUS
s
Rich Instruction Set with 14 Addressing Modes
s
Division-by-zero trap generation
s
Versatile
Development
Tools,
including
Assembler,
Linker,
C-Compiler,
Archiver,
Source Level Debugger, Hardware Emulators
and Real Time Operating System
DEVICE SUMMARY
Device
Pack-
age
Flash RAM E
ST92F120R6T
-
TQF P
64
-48
1
36K
1.5K 512
ST92F120JR6T 1
ST92F120V6Q
-
PQFP
100
277
ST92F120JV6Q 1
ST92F120R9T
-
TQF P
64
-48 1
60K
2K
512
ST92F120JR9T 1
ST92F120V9Q
-
PQFP
100
277 2
ST92F120JV9Q 1
ST92F120R1T
-
TQF P
64
-48 1
128K
4K
1K
ST92F120JR1T 1
ST92F120V1Q
-
PQFP
100
277 2
ST92F120JV1Q 1
PQFP100
TQFP64
9


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