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74LVQ373 Datasheet(PDF) 2 Page - STMicroelectronics |
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74LVQ373 Datasheet(HTML) 2 Page - STMicroelectronics |
2 / 13 page 74LVQ373 2/13 Figure 2: Input And Output Equivalent Circuit Table 2: Pin Description Table 3: Truth Table X : Don’t Care; Z : High Impedance * : Q outputs are latched at the time when the LE input is taken low logic level Figure 3: Logic Diagram PIN N° SYMBOL NAME AND FUNCTION 1OE 3 State Output Enable Input (Active LOW) 2, 5, 6, 9, 12, 15, 16,19 Q0 to Q7 3-State Latch Outputs 3, 4, 7, 8, 13, 14, 17, 18 D0 to D7 Data Inputs 11 LE Latch Enable Input 10 GND Ground (0V) 20 VCC Positive Supply Voltage INPUTS OUTPUT OE LE D Q HX X Z L L X NO CHANGE* LH L L L HHH |
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