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74LVQ573TTR Datasheet(PDF) 5 Page - STMicroelectronics

No. de pieza 74LVQ573TTR
Descripción Electrónicos  LOW VOLTAGE CMOS OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

74LVQ573TTR Datasheet(HTML) 5 Page - STMicroelectronics

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Table 9: Capacitive Characteristics
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/n (per latch)
Figure 4: Test Circuit
CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
CIN
Input Capacitance
3.3
4
pF
COUT
Output
Capacitance
3.3
8
pF
CPD
Power Dissipation
Capacitance
(note 1)
3.3
fIN = 10MHz
10
pF
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
2VCC
tPZH, tPHZ
Open


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