©2005 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FAN5308 Rev. 1.0.2

7

Block Diagram

Figure 15. Block Diagram

Detailed Operation Description

The FAN5308 is a step-down converter operating in a

current-mode PFM/PWM architecture with a typical

switching frequency of 1.3MHz. At moderate to heavy

loads, the converter operates in pulse-width-modulation

(PWM) mode. At light loads, the converter enters a

power-save mode (PFM pulse skipping) to keep the effi-

ciency high.

PWM Mode

In PWM mode, the device operates at a fixed frequency

of 1.3MHz. At the beginning of each clock cycle, the P-

channel transistor is turned on. The inductor current

ramps up and is monitored via an internal circuit. The P-

channel switch is turned off when the sensed current

causes the PWM comparator to trip when the output volt-

age is in regulation or when the inductor current reaches

the current limit (set internally to typically 1500mA). After

a minimum dead time, the N-channel transistor is turned

on and the inductor current ramps down. As the clock

cycle is completed, the N-channel switch is turned off

and the next clock cycle starts.

PFM (Power-Save) Mode

As the load current decreases and the inductor current

reaches negative value, the converter enters pulse-fre-

quency-modulation (PFM) mode. The transition point for

the PFM mode is given by the equation:

The typical output current, when the device enters PFM

mode, is 150mA for input voltage of 3.6V and output volt-

age of 1.2V. In PFM mode, the device operates with a

variable frequency and constant peak current, thus

reducing the quiescent current to minimum. Conse-

quently, the high efficiency is maintained at light loads.

As soon as the output voltage falls below a threshold, set

at 0.8% above the nominal value, the P-channel transis-

tor is turned on and the inductor current ramps up. The

P-channel switch turns off and the N-channel turns on as

the peak inductor current is reached (typical 450mA).

FB

ERROR

AMP

NEG.

LIMIT

COMP

PFM

COMP

LOGIC

CONTROL

OVER-

VOLTAGE

COMP

UNDER-VOLTAGE

LOCKOUT

MOSFET

DRIVER

OSC

SLOPE COMPENSATION

REF

FB

REF

IS

IS

CURRENT

SENSE

NEG.

LIMIT

SENSE

DIGITAL

SOFT START

IS

GND

SW

V

IN

EN

GND

0.8V

COMP

I

OUT

V

OUT

1

V

⁄

()

–

2Lf

×

×

--------------------------------------------

×

=

EQ. 1