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2SJ552STL-E Datasheet(PDF) 3 Page - Renesas Technology Corp

No. de pieza 2SJ552STL-E
Descripción Electrónicos  Silicon P Channel MOS FET
Download  9 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

2SJ552STL-E Datasheet(HTML) 3 Page - Renesas Technology Corp

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2SJ552(L), 2SJ552(S)
Rev.4.00 Sep 07, 2005 page 3 of 8
Main Characteristics
Case Temperature
Tc (°C)
Power vs. Temperature Derating
Drain to Source Voltage
VDS (V)
Typical Output Characteristics
Gate to Source Voltage
VGS (V)
Typical Transfer Characteristics
–50
0
–10
–20
–30
–40
0–2
–4
–6
–8
–10
–50
0
–10
–20
–30
–40
0
–1–2–3–4–5
Tc = 75°C
80
0
20
40
60
0
50
100
150
200
VDS = –10 V
Pulse Test
–10 V
–5 V
–6 V
–8 V
–4 V
–4.5 V
–3.5 V
–3 V
VGS = –2.5 V
Pulse Test
Drain to Source Voltage
VDS (V)
Maximum Safe Operation Area
–100
–300
–10
–30
–0.3
–1
–3
–0.1
–0.1
–0.3
–1
–3
–10
–30
–100
–1000
Ta = 25°C
PW
= 10
ms
(1 shot)
DC
Operation
(Tc
=
25°C)
1 ms
10
µs
100
µs
Operation in
this area is
limited by RDS (on)
Gate to Source Voltage
VGS (V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
–2.0
0
–0.4
–0.8
–1.2
–1.6
0
–4
–8
–12
–16
–20
Pulse Test
ID = –20 A
–5 A
–10 A
–2 A
Drain Current
ID (A)
Static Drain to Source on State Resistance
vs. Drain Current
0.2
0.1
0.02
0.05
0.01
–2
–20
–50
–1
–10
–5
–100
1
0.5
VGS = –4 V
–10 V
Pulse Test
–25°C
25°C


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