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2SJ518 Datasheet(PDF) 5 Page - Renesas Technology Corp |
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2SJ518 Datasheet(HTML) 5 Page - Renesas Technology Corp |
5 / 7 page 2SJ518 Rev.4.00 Sep 07, 2005 page 5 of 6 Avalanche Test Circuit Avalanche Waveform 0 ID VDS IAP V(BR)DSS VDD EAR = • L • IAP 2 • 2 1 VDSS VDSS – VDD D.U.T Rg IAP Monitor VDS Monitor VDD 50 Ω Vin –15 V L Source to Drain Voltage VSD (V) Reverse Drain Current vs. Source to Drain Voltage 0.5 25 50 75 100 125 150 0 0.1 0.2 0.3 0.4 Channel Temperature Tch (°C) Maximum Avalanche Energy vs. Channel Temperature Derating IAP = –2 A VDD = –25 V duty < 0.1 % Rg ≥ 50 Ω –5 0 –1 –2 –3 –4 0 –0.4 –0.8 –1.2 –1.6 –2.0 Pulse Test –5 V VGS = 0, 5 V –10 V tr td(on) Vin 90% 90% 10% 10% Vout td(off) 90% 10% tf Switching Time Test Circuit Waveform Vin Monitor D.U.T. Vin –10 V RL Vout Monitor 50 Ω VDD = –30 V |
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