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TS1220-700B Datasheet(PDF) 5 Page - STMicroelectronics |
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TS1220-700B Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 11 page TN12, TS12 and TYNx12 Series 5/11 Figure 9: Relative variation of dV/dt immunity versus gate-cathode resistance (typical values) for TS8 series Figure 10: Relative variation of dV/dt immunity versus gate-cathode capacitance (typical values) for TS8 series Figure 11: Surge peak on-state current versus number of cycles Figure 12: Non-repetitive surge peak on-state current for a sinusoidal pulse with width tp < 10 ms, and corresponding values of I²t Figure 13: On-state characteristics (maximum values) Figure 14: Thermal resistance junction to ambient versus copper surface under tab (epoxy printed circuit board FR4, copper thickness: 35µm) (DPAK and D2PAK) 0 200 400 600 800 1000 1200 0.1 1.0 10.0 R(k ) GK Ω dV/dt[R ] / dV/dt[ =220 ] GK Ω RGK Tj = 125°C V = 0.67 x V D DRM 0 25 50 75 100 125 150 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 C (nF) GK dV/dt[C ] / dV/dt[ =220 ] GK Ω RGK T V = 0.67 x V = 125°C R = 220 D DRM GK j Ω 1 10 100 1000 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 I (A) TSM Number of cycles Non repetitive T initial=25°C j Repetitive T =105°C C TS12 TN12 / TYN12 t =10ms p One cycle 0.01 0.10 1.00 10.00 10 100 1000 2000 I (A), I t (A s) TSM 22 t (ms) p I t 2 ITSM T initial = 25°C j TS12 TS12 TN12 / TYN12 TN12 / TYN12 dI/dt limitation 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1 10 100 200 I (A) TM V (V) TM Tj=max T =25°C j V =0.85V R =30m T max.: j t0 d Ω 0 2 4 6 8 10 12 14 16 18 20 0 20 40 60 80 100 S(cm²) R (°C/W) th(j-a) DPAK DPAK 2 |
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