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CDB42325 Datasheet(PDF) 8 Page - Cirrus Logic |
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CDB42325 Datasheet(HTML) 8 Page - Cirrus Logic |
8 / 71 page 8 DS838A2 CS42325 1. PIN DESCRIPTIONS 1.1 Software Mode Pin Name # Pin Description SDA/CDOUT 1 I²C Format SDA (Input/Output) - Acts as an input/output data pin. An external pull-up resistor is required for I²C control port operation. SPI Format CDOUT (Output) - Acts as an output only data pin. SCL/CCLK 2 I²C Format, SCL (Input) - Serial clock for the serial control port. An external pull-up resistor is required for I²C control port operation. SPI Format, CCLK (Input) - Serial clock for the serial control port. AD0/CS 3 I²C Format, AD0 (Input) - Forms the device address input AD[0]. SPI Format, CS (Input) - Acts as the active low chip select input. AD1/CDIN 4 I²C Format, AD1 (Input) - Forms the device address input AD[1]. SPI Format, CDIN (Input) - Becomes the input data pin. INT 5 Interrupt (Output) - Indicates an interrupt condition has occurred. FILT+ 6 FILT+ (Output) - Full-scale reference voltage for ADC. VCMADC 7 ADC Common-Mode Voltage (Output) - Filter connections for the ADC internal quiescent refer- ence voltage. GND 8 Analog Ground (Input) - Analog ground reference. VA 9 Analog Power (Input) - Positive power for the internal analog section. VBIAS 10 Bias Voltage (Output) - Positive reference voltage for the internal DAC. OVFL SCL/CCLK AD0/CS AD1/CDIN INT SDA/CDOUT FILT+ VCMADC GND VA VBIAS MUTEC1 MUTEC2 RST AIN1A AIN1B AIN2A AIN2B AIN3A AIN3B AIN4A AIN4B AIN5A AIN5B 6 2 4 8 1 3 5 7 9 11 12 31 35 33 29 27 36 34 32 30 28 26 25 10 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 CS42325 |
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