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TC1070VCT Datasheet(PDF) 3 Page - TelCom Semiconductor, Inc

No. de pieza TC1070VCT
Descripción Electrónicos  50mA ADJUSTABLE CMOS LDO WITH SHUTDOWN
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Fabricante Electrónico  TELCOM [TelCom Semiconductor, Inc]
Página de inicio  http://www.telcom-semi.com
Logo TELCOM - TelCom Semiconductor, Inc

TC1070VCT Datasheet(HTML) 3 Page - TelCom Semiconductor, Inc

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TC1070
3
PRELIMINARY INFORMATION
TC1070-01
6/13/97
50mA ADJUSTABLE CMOS
LDO WITH SHUTDOWN
ELECTRICAL CHARACTERISTICS: VIN = VOUT + 1V, IL = 0.1mA, CL = 3.3µF, SHDN > VIH, TA = 25
°C, unless otherwise noted.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
ADJ Input
IADJ
Adjust Input Leakage Current
50
pA
NOTES: 1. VR is the regulator output voltage setting.
2. TC VOUT = (VOUTMAX – VOUTMIN) x 106
VOUT x ∆T
3. Regulation is measured at a constant junction temperature using low duty cycle pulse testing. Load regulation is tested over a load
range from 0.1mA to the maximum specified output current. Changes in output voltage due to heating effects are covered by the
thermal regulation specification.
4. Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value.
5. Ground pin current is the regulator pass transistor gate current. The total current drawn from the input supply is the sum of the load
current, ground current and supply current (i.e. IIN = ISUPPLY + IGND + ILOAD).
6. Thermal Regulation is defined as the change in output voltage at a time T after a change in power dissipation is applied, excluding load
or line regulation effects. Specifications are for a current pulse equal to ILMAX at VIN = 6V for T = 10msec.
7. The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the
thermal resistance from junction-to-air (i.e. TA, TJ, qJA). Exceeding the maximum allowable power dissipation causes the device to
initiate thermal shutdown. Please see
Thermal Considerations section of this data sheet for more details.
Pin No.
1VIN
Unregulated supply input.
2
GND
Ground terminal.
3
SHDN
Shutdown control input. The regulator is fully enabled when a logic high is applied to this
input. The regulator enters shutdown when a logic low is applied to this input. During
shutdown, output voltage falls to zero and supply current is reduced to 0.05 microamp
(typical).
4
ADJ
Output voltage adjust terminal. Output voltage setting is programmed with a resistor divider
from VOUT to this input. A capacitor may also be added to this input to resuce output noise
(See Text).
5VOUT
Regulated voltage output.
PIN DESCRIPTION
(SOT-23A-5)
Symbol
Description


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