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CDK8307 Datasheet(PDF) 10 Page - Cadeka Microcircuits LLC.

No. de pieza CDK8307
Descripción Electrónicos  12/13-bit, 20/40/50/65MSPS, Eight Channel, Ultra Low Power ADC with LVDS
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Fabricante Electrónico  CADEKA [Cadeka Microcircuits LLC.]
Página de inicio  http://www.cadeka.com
Logo CADEKA - Cadeka Microcircuits LLC.

CDK8307 Datasheet(HTML) 10 Page - Cadeka Microcircuits LLC.

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©2009 CADEKA Microcircuits LLC
www.cadeka.com
10
PRELIMINARY Data Sheet
Electrical Characteristics
(AVDD = 1.8V, DVDD = 1.8V, OVDD = 1.8V, 50MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 14-bit output, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DC Accuracy
No Missing Codes
Guaranteed
Offset Error
Offset error after digital offset cancellation
1
LSB
Gain Error
-6
6
%FS
Gain Matching
Gain matching between channels. ±3sigma
value at worst case conditions.
-0.5
0.5
%FS
DNL
Differential Non-Linearity
12-bit level
±0.2
LSB
INL
Integral Non-Linearity
12-bit level
±0.6
LSB
VCMO
Common Mode Voltage Output
VAVDD/2
V
Analog Input
VCMI
Input Common Mode
Analog input common mode voltage
VCM -0.1
VCM +0.2
V
VFSR
Full Scale Range
Differential input voltage range
2.0
Vpp
Input Capacitance
Differential input capacitance
2
pF
Bandwidth
Input bandwidth
500
MHz
Power Supply
AVDD
Analog Supply Voltage
1.7
1.8
2.0
V
DVDD
Digital Supply Voltage
Digital and output driver supply voltage
1.7
1.8
2.0
V
OVDD
Digital CMOS Input Supply Voltage
1.7
1.8
3.6
V
Electrical Characteristics - CDK8307A
(AVDD = 1.8V, DVDD = 1.8V, OVDD = 1.8V, 20MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 14-bit output, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Performance
SNR
Signal to Noise Ratio
FIN = 8MHz
72.2
dBFS
SINAD
Signal to Noise and Distortion Ratio
FIN = 8MHz
71.5
dBFS
SFDR
Spurious Free Dynamic Range
FIN = 8MHz
82
dBc
HD2
Second order Harmonic Distortion
FIN = 8MHz
95
dBc
HD3
Third order Harmonic Distortion
FIN = 8MHz
82
dBc
ENOB
Effective number of Bits
11.6
bits
Crosstalk
Signal applied to 7 channels (FIN0).
Measurement taken on one channel with full
scale at FIN1. FIN1 = 8MHz, FIN0 = 9.9MHz
95
dBc
Power Supply
Analog supply current
47
mA
Digital supply current
Digital and output driver supply
50
mA
Analog power Dissipation
85
mW
Digital power Dissipation
90
mW
Total power Dissipation
175
mW
Power Down Dissipation
10
μW
Sleep Mode Dissipation
43
mW
Sleep Channel Mode Dissipation
Power dissipation with all chs in sleep mode
44
mW
Sleep Channel Mode Savings
Power dissipation savings per channel off
16
mW
Clock Inputs
Maximum Conversion Rate
20
MSPS
Minimum Conversion Rate
15
MSPS


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