SN74ALVCH162260

12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH

WITH 3-STATE OUTPUTS

SCAS570H – MARCH 1996 – REVISED JUNE 1999

5

POST OFFICE BOX 655303

recommended operating conditions (see Note 4)

MIN

MAX

UNIT

VCC

Supply voltage

1.65

3.6

V

VCC = 1.65 V to 1.95 V

0.65

× VCC

VIH

High-level input voltage

VCC = 2.3 V to 2.7 V

1.7

V

VCC = 2.7 V to 3.6 V

2

VCC = 1.65 V to 1.95 V

0.35

× VCC

VIL

Low-level input voltage

VCC = 2.3 V to 2.7 V

0.7

V

VCC = 2.7 V to 3.6 V

0.8

VI

Input voltage

0

VCC

V

VO

Output voltage

0

VCC

V

VCC = 1.65 V

–4

High level output current (A port)

VCC = 2.3 V

–12

High-level output current (A port)

VCC = 2.7 V

–12

IOH

VCC = 3 V

–24

mA

IOH

VCC = 1.65 V

–2

mA

High level output current (B port)

VCC = 2.3 V

–6

High-level output current (B port)

VCC = 2.7 V

–8

VCC = 3 V

–12

VCC = 1.65 V

4

Low level output current (A port)

VCC = 2.3 V

12

Low-level output current (A port)

VCC = 2.7 V

12

IOL

VCC = 3 V

24

mA

IOL

VCC = 1.65 V

2

mA

Low level output current (B port)

VCC = 2.3 V

6

Low-level output current (B port)

VCC = 2.7 V

8

VCC = 3 V

12

∆t/∆v

Input transition rise or fall rate

10

ns/V

TA

Operating free-air temperature

–40

85

°C

NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.