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SN74F112 Datasheet(PDF) 3 Page - Texas Instruments |
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SN74F112 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 5 page SN74F112 DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SDFS048A – D2932, MARCH 1987 – REVISED OCTOBER 1993 2–3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions MIN NOM MAX UNIT VCC Supply voltage 4.5 5 5.5 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –1 mA IOL Low-level output current 20 mA TA Operating free-air temperature 0 70 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK VCC = 4.5 V, II = – 18 mA – 1.2 V VOH VCC = 4.5 V, IOH = – 1 mA 2.5 3.4 V VOH VCC = 4.75 V, IOH = – 1 mA 2.7 V VOL VCC = 4.5 V, IOL = 20 mA 0.3 0.5 V II VCC = 5.5 V, VI = 7 V 0.1 mA IIH VCC = 5.5 V, VI = 2.7 V 20 µA J or K – 0.6 IIL PRE or CLR VCC = 5.5 V, VI = 0.5 V –3 mA CLK – 2.4 IOS‡ VCC = 5.5 V, VO = 0 –60 –150 mA ICC VCC = 5.5 V, See Note 2 12 19 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. NOTE 2: ICC is measured with all outputs open, the Q and Q outputs alternately high and the clock input grounded at the time of measurement. timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) VCC = 5 V, TA = 25°C MIN MAX UNIT MIN MAX fclock Clock frequency 0 110 0 100 MHz t Pulse duration CLK high or low 4.5 5 ns tw Pulse duration CLR or PRE low 4.5 5 ns t Setup time data before CLK ↓ High 4 5 ns tsu Setup time, data before CLK ↓ Low 3 3.5 ns th Hold time data after CLK ↓ High 0 0 ns th Hold time, data after CLK ↓ Low 0 0 ns tsu Setup time, inactive state, data before CLK ↓§ CLR or PRE high 4 5 ns § Inactive-state state setup time is also referred to as recovery time. |
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