TPIC6B273

POWER LOGIC OCTAL D-TYPE LATCH

SLIS031 – APRIL 1994 – REVISED JULY 1995

1

POST OFFICE BOX 655303

150-mA Continuous Current

description

The TPIC6B273 is a monolithic, high-voltage,

medium-current, power logic octal D-type latch

with DMOS-transistor outputs designed for use in

systems that require relatively high load power.

The device contains a built-in voltage clamp on

the outputs for inductive transient protection.

Power driver applications include relays, sole-

noids, and other medium-current or high-voltage

loads.

The TPIC6B273 contains eight positive-edge-

triggered D-type flip-flops with a direct clear input.

Each flip-flop features an open-drain power

DMOS-transistor output.

When clear (CLR) is high, information at the D

inputs meeting the setup time requirements is

transferred to the DRAIN outputs on the positive-

going edge of the clock (CLK) pulse. Clock

triggering occurs at a particular voltage level and

is not directly related to the transition time of the

positive-going pulse. When the clock input (CLK)

is at either the high or low level, the D input signal

has no effect at the output. An asynchronous CLR

is provided to turn all eight DMOS-transistor

outputs off. When data is low for a given output,

the DMOS-transistor output is off. When data is

high, the DMOS-transistor output has sink-current

capability.

Outputs

are

low-side,

open-drain

DMOS

transistors with output ratings of 50 V and 150-mA

continuous sink-current capability. Each output

provides a 500-mA typical current limit at

junction temperature increases for additional

device protection.

The TPIC6B273 is characterized for operation over the operating case temperature range of – 40

°C to 125°C.

Copyright

© 1997, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

CLR

D1

D2

DRAIN1

DRAIN2

DRAIN3

DRAIN4

D3

D4

GND

D8

D7

DRAIN8

DRAIN7

DRAIN6

DRAIN5

D6

D5

CLK

DW OR N PACKAGE

(TOP VIEW)

R

1

11

CLK

C1

DRAIN1

4

DRAIN2

5

DRAIN3

6

DRAIN4

7

DRAIN5

14

DRAIN6

15

DRAIN7

16

DRAIN8

17

CLR

† This symbol is in accordance with ANSI/IEEE Standard 91-1984

and IEC Publication 617-12.

INPUTS

OUTPUT

L

H

H

H

FUNCTION TABLE

(each channel)

CLK

D

X

↑

↑

L

X

H

L

X

H

L

H

Latched

CLR

DRAIN

H = high level, L = low level, X = irrelevant

1D

2

D1

3

D2

8

D3

9

D4

12

D5

13

D6

18

D7

19

D8

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.